參數(shù)資料
型號: IA6805E2PLC44IR0
廠商: Innovasic Semiconductor
文件頁數(shù): 29/33頁
文件大?。?/td> 0K
描述: IC MCU 8BIT 5MHZ 44PLCC
標(biāo)準(zhǔn)包裝: 270
芯體尺寸: 8-位
速度: 5MHz
外圍設(shè)備: POR
輸入/輸出數(shù): 20
程序存儲器類型: 外部程序存儲器
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 管件
IA6805E2
29 August 2007
Microprocessor Unit
As of Production Version 00
I/O Pin Functions
R/W-n DDR
I/O Pin Functions
00
The I/O pin is in input mode. Data is
written into the output data latch.
01
Data is written into the output data latch and
output to the I/O pin.
10
The state of the I/O pin is read.
11
the I/O pin is in an output mode. The
output data latch is read.
I/O Port Circuitry and Register Configuration:
DATA DIRECTION
REGISTER
BIT
I/O
PIN
OUTPUT
LATCHED
OUTPUT
DATA BIT
INPUT
REG
BIT
INPUT
I/O
PIN
TO
AND
FROM
CPU
DDA7
(DDB7)
DDA1
(DDB1)
DDA2
(DDB2)
DDA3
(DDB3)
DDA4
(DDB4)
DDA5
(DDB5)
DDA6
(DDB6)
DDA0
(DDB0)
DATA DIRECTION
A(B)
REGISTER
PORT A(B)
REGISTER
74
5
630
1
2
PA7
(PB7)
PA6
(PB6)
PA5
(PB5)
PA4
(PB4)
PA3
(PB3)
PA2
(PB2)
PA1
(PB1)
PA0
(PB0)
PIN
$0004 ($0005)
$0000 ($0001)
Figure 2. PA0-PA7/PB0-PB7 (Input/Output Lines)
Copyright 2007
IA211081401-03
www.Innovasic.com
Customer Support:
Page 5 of 33
1-888-824-4184
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