- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄67682 > IBM25PPC405EP-3GB133C 32-BIT, 133.33 MHz, RISC PROCESSOR, PBGA385 PDF資料下載
參數(shù)資料
| 型號： | IBM25PPC405EP-3GB133C |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 133.33 MHz, RISC PROCESSOR, PBGA385 |
| 封裝： | 31 MM, ENHANCED, PLASTIC, BGA-385 |
| 文件頁數(shù)： | 39/52頁 |
| 文件大?。?/td> | 992K |
| 代理商： | IBM25PPC405EP-3GB133C |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁當(dāng)前第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁
Preliminary
PowerPC 405EP Embedded Processor Data Sheet
Page 44 of 52
6/9/03
Clocking Waveform
Spread Spectrum Clocking
Care must be taken when using a spread spectrum clock generator (SSCG) with the PPC405EP. This
controller uses a PLL for clock generation inside the chip. The accuracy with which the PLL follows the SSCG
is referred to as tracking skew. The PLL bandwidth and phase angle determine how much tracking skew
there is between the SSCG and the PLL for a given frequency deviation and modulation frequency. When
using an SSCG with the PPC405EP the following conditions must be met:
The frequency deviation must not violate the minimum clock cycle time. Therefore, when operating the
PPC405EP with one or more internal clocks at their maximum supported frequency, the SSCG can only
lower the frequency.
The maximum frequency deviation cannot exceed
3%, and the modulation frequency cannot exceed
40kHz. In some cases, on-board PPC405EP peripherals impose more stringent requirements (see
Note 1).
Use the peripheral bus clock (PerClk) for logic that is synchronous to the peripheral bus since this clock
tracks the modulation.
Use the SDRAM MemClkOut since it also tracks the modulation.
Notes:
1. The serial port baud rates are synchronous to the modulated clock. The serial port has a tolerance of
approximately 1.5% on baud rate before framing errors begin to occur. The 1.5% tolerance assumes that
the connected device is running at precise baud rates. If an external serial clock is used the baud rate is
unaffected by the modulation
2. Operation of the PPC405EP PCI Bridge is unaffected by the use of an SSCG.
The PCI controller must be operated in asynchronous mode. When in asynchronous mode, the PCI bus
clock must be driven into the PPC405EP PCIClk input. In this configuration the PCI controller supports the
66.66 MHz PCI clock specification which specifies a maximum frequency deviation of -1% at a modulation
of between 30 kHz and 33 kHz.
3. Ethernet operation is unaffected.
4. IIC operation is unaffected.
Caution: It is up to the system designer to ensure that any SSCG used with the PPC405EP meets the above
requirements and does not adversely affect other aspects of the system.
TCL
TCH
TC
2.0V
1.5V
0.8V
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IBM25PPC405GP-3DD200C | RISC PROCESSOR, PBGA456 |
| IBM25PPC405GP-3BD266C | RISC PROCESSOR, PBGA456 |
| IBM25PPC405GP3EE200CZ | 32-BIT, 200 MHz, RISC PROCESSOR, PBGA413 |
| IBM25PPC405GP-3BE200C | 32-BIT, 200 MHz, RISC PROCESSOR, PBGA456 |
| IBM25PPC405GP-3EE266C | 32-BIT, 266.66 MHz, RISC PROCESSOR, PBGA413 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IBM25PPC405GP3BC200C | 制造商:IBM 功能描述: |
| IBM25PPC405GP-3BC200C | 制造商:IBM 功能描述: 制造商:IBM 功能描述:Electronic Component |
| IBM25PPC405GP-3BD200C | 制造商:IBM 功能描述: |
| IBM25PPC405GP-3BE200C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MICROPROCESSOR|32-BIT|CMOS|BGA|456PIN|PLASTIC |
| IBM25PPC405GP3BE200CZ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MICROPROCESSOR|32-BIT|CMOS|BGA|456PIN|PLASTIC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。