參數(shù)資料
型號(hào)： IBM25PPC405EP-3GB133C
元件分類(lèi)： 微控制器/微處理器
英文描述： 32-BIT, 133.33 MHz, RISC PROCESSOR, PBGA385
封裝： 31 MM, ENHANCED, PLASTIC, BGA-385
文件頁(yè)數(shù)： 46/52頁(yè)
文件大?。?/td> 992K
代理商： IBM25PPC405EP-3GB133C
Preliminary
PowerPC 405EP Embedded Processor Data Sheet
Page 50 of 52
6/9/03
Initialization
The following describes the method by which initial chip settings are established when a system reset occurs.
Strapping
When the SysReset input is driven low (system reset), the state of certain I/O pins is read to enable default
initial conditions prior to PPC405EP start-up. The actual capture instant is the nearest system clock edge
before the deassertion of reset. These pins must be strapped using external pull-up (logical 1) or pull-down
(logical 0) resistors to select the desired default conditions. The recommended pull-up is 3k
to +3.3V or
10k
to +5V. The recommended pull-down is 1K to GND. These pins are use for strap functions only
during reset. They are used for other signals during normal operation. The following table lists the strapping
pins along with their functions and strapping options. The signal names assigned to the pins for normal
operation appear below the pin number.
EEPROM
During reset, configuration values other than the internal default values can be read from a serial EEPROM
connected to the IIC port. The association of bits in the EEPROM with the configuration values and their
default values are covered in detail in the
PowerPC 405EP Embedded Processor User’s Manual.
Caution: If P04 is strapped to 1, and the EEPROM is not connected or is defective, the PPC405EP remains
in the reset state and will not boot.
Revision Log
Strapping Pin Assignments
Function
Option
Ball Strapping
IIC EEPROM controller
If the controller is enabled, 32 bytes of configuration
data are read from the EEPROM.
P04
UART0_Tx
Disable
0
Enable
1
EEPROM address (P04 = 1)
or
Boot ROM width (P04 = 0)
N02
UART0_RTS
Y17
SysErr
When P04 = 1, these pins set the high-order two bits of
the EEPROM base address.
High order EEPROM base address bits
Address bit
When P04 = 0, these pins indicated the width of the
boot ROM.
8 bits0
0
16 bits0
1
reserved
1
0
reserved
1
Date
Contents of Modification
01/30/2003
Add revision log.
03/18/2003
Update revision level of chip.
05/13/2003
Add 333 MHZ part numbers.
06/09/2003
Add new supply voltage specs for 333 MHz.
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IBM25PPC405GP-3BD200C 制造商:IBM 功能描述:
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IBM25PPC405GP3BE200CZ 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MICROPROCESSOR|32-BIT|CMOS|BGA|456PIN|PLASTIC
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