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參數(shù)資料
| 型號： | ICS1889 |
| 英文描述： | 100Base-FX Integrated PHYceiverTM |
| 中文描述： | 100Base - FX光纖綜合PHYceiverTM |
| 文件頁數(shù)： | 15/35頁 |
| 文件大?。?/td> | 1096K |
| 代理商： | ICS1889 |
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15
ICS1889
Enable Far End Fault (bit 4)
If this bit is set to a logic one, the far end fault logic becomes
active resulting in faults being signaled and recognized via the
in-band signaling scheme. If this bit is set to a logic zero,
the far end fault logic is disabled.
Transmit Far End Fault (bit 3)
Management may indicate a fault has occurred to its link
partner by setting this bit to a logic one. Indicating a fault
brings the link down and disables the reception of data until
this bit is cleared and the link is reestablished.
Invalid Error Code Test (bit 2)
If this bit is set to a logic one, the 4B5B encoder operates as a
5B5B encoder obtaining the fifth bit of the code group from
the value of TXER.
Reserved (bit 1)
This bit is reserved for ICS use. It must always be written with
a logic zero. A read always returns a logic zero.
Reserved (bit 0)
This bit is reserved for ICS use. It must always be written with
a logic zero. A read always returns a logic zero.
相關PDF資料 |
PDF描述 |
|---|---|
| ICS1892 | 10Base-T/100Base-TX Integrated PHYceiver |
| ICS1892Y | 10Base-T/100Base-TX Integrated PHYceiver |
| ICS1892Y-10 | 10Base-T/100Base-TX Integrated PHYceiver |
| ICS1892Y-14 | 10Base-T/100Base-TX Integrated PHYceiver |
| ICS1893AF | 3.3V 10Base-T/100Base-TX Integrated PHYceiverTM |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ICS1890 | 制造商:ICS 制造商全稱:ICS 功能描述:Auto-Negotiation Advertisement Register (register 4 [0x04]) |
| ICS1890Y | 制造商:ICS 功能描述: 制造商:ICS 功能描述:LAN Transceiver, Single, 64 Pin, Plastic, QFP 制造商:ICS 功能描述:1890Y-4 制造商:Integrated Device Technology Inc 功能描述:LAN Transceiver, Single, 64 Pin, Plastic, QFP |
| ICS1890Y-14 | 制造商:ICS 制造商全稱:ICS 功能描述:Auto-Negotiation Advertisement Register (register 4 [0x04]) |
| ICS1890Y-4 | 制造商:ICS 功能描述:1890Y-4 |
| ICS1891 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Transceiver |
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