- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1923 > ICS1894KI-32LF (IDT, Integrated Device Technology Inc)PHYCEIVER LOW PWR 3.3V 32QFN PDF資料下載
參數(shù)資料
| 型號： | ICS1894KI-32LF |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 7/50頁 |
| 文件大?。?/td> | 0K |
| 描述： | PHYCEIVER LOW PWR 3.3V 32QFN |
| 標準包裝： | 490 |
| 類型： | PHY 收發(fā)器 |
| 規(guī)程： | MII，RMII |
| 電源電壓： | 3.14 V ~ 3.47 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤 |
| 供應商設備封裝： | 32-QFN 裸露焊盤（5x5） |
| 包裝： | 托盤 |
第1頁第2頁第3頁第4頁第5頁第6頁當前第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁
ICS1894-32
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
PHYCEIVER
IDT 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
15
ICS1894-32
REV M 021512
Pins for Monitoring the Data Link table
Note:
1. During either power-on reset or hardware reset, each
multi-function configuration pin is an input that is sampled
when the ICS1894-32 exits the reset state. After sampling is
complete, these pins are output pins that can drive status
LEDs.
2. A software reset does not affect the state of a
multi-function configuration pin. During a software reset, all
multi-function configuration pins are outputs.
3. Each multi-function configuration pin must be pulled
either up or down with a resistor to establish the address of
the ICS1894-32. LEDs may be placed in series with these
resistors to provide a designated status indicator as
described in the Pins for Monitoring the Data Link table. Use
1K
Ω resistors.
Caution: Pins listed in the Pins for Monitoring the Data Link
table must not float.
4. As outputs, the asserted state of a multi-function
configuration pin is the inverse of the sense sampled during
reset. This inversion provides a signal that can illuminate an
LED during an asserted state. For example, if a
multi-function configuration pin is pulled down to ground
through an LED and a current-limiting resistor, then the
sampled sense of the input is low. To illuminate this LED for
the asserted state, the output is driven high.
5. Adding 10K
Ωresistors across the LEDs ensures the PHY
address is fully defined during slow VDD power-ramp
conditions.
6. PHY address 00 tri-states the MII interface. (Do not select
PHY address 00 unless you want the MII tri-stated.)
The following figure shows typical biasing and LED connections for the ICS1894-32.
The above circuit decodes the PHY address = 1
Pin
Status Events that drive the LEDs
P0/LED0
Link, Activity, Tx, Rx, COL, Mode, Dplx
P1/ISO/LED1
Link, Activity, Tx, Rx, COL, Mode, Dplx
ICS1894-32
32
31
P1/ISO/LED1
P0/LED0
LED0
1K
Ω
10K
Ω
VDD
LED1
1K
Ω
10K
Ω
相關PDF資料 |
PDF描述 |
|---|---|
| ICS1894KI-40LFT | PHYCEIVER LOW PWR 3.3V 40QFN |
| ID82C55A | IC I/O EXPANDER 24B 40DIP |
| ID82C82 | IC DRIVER BUS OCT LATCHING 20DIP |
| ID82C86H | IC TRANSCEIVER OCT BUS 20-DIP |
| IDT5V5201DCGI | TXRX 1CH M-LVDS TO LVTTL 8-SOIC |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ICS1894KI-32LFT | 功能描述:PHYCEIVER LOW PWR 3.3V 32QFN RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:PHYceiver™ 產(chǎn)品培訓模塊:RS-232 & USB Transceiver 標準包裝:2,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):1/1 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SSOP（0.209"，5.30mm 寬） 供應商設備封裝:16-SSOP 包裝:帶卷 (TR) 其它名稱:296-19849-2 |
| ICS1894KI-33LF | 制造商:Integrated Device Technology Inc 功能描述:PHYCEIVER LOW PWR 3.3V 32QFN |
| ICS1894KI-33LFT | 制造商:Integrated Device Technology Inc 功能描述:PHYCEIVER LOW PWR 3.3V 32QFN |
| ICS1894KI-34LF | 制造商:Integrated Device Technology Inc 功能描述:PHYCEIVER LOW PWR 3.3V 32QFN |
| ICS1894KI-34LFT | 制造商:Integrated Device Technology Inc 功能描述:PHYCEIVER LOW PWR 3.3V 32QFN |
發(fā)布緊急采購，3分鐘左右您將得到回復。