PROGRAMMABLE FEMTOCLO" />
參數(shù)資料
型號: ICS83PR226BKI-01LFT
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 12/23頁
文件大?。?/td> 0K
描述: IC SYNTHESIZER PROGR 10-VFQFPN
標(biāo)準(zhǔn)包裝: 2,500
系列: HiPerClockS™, FemtoClock™
類型: 時(shí)鐘/頻率合成器
PLL:
輸入: 晶體
輸出: LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 1:1
差分 - 輸入:輸出: 無/是
頻率 - 最大: 213.33MHz
除法器/乘法器: 是/無
電源電壓: 2.375 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 10-VQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 10-VFQFPN(5x7)
包裝: 帶卷 (TR)
其它名稱: 83PR226BKI-01LFT
ICS83PR226BKI-01 REVISION B AUGUST 10, 2010
2
2010 Integrated Device Technology, Inc.
ICS83PR226I-01 Data Sheet
PROGRAMMABLE FEMTOCLOCK LVPECL OSCILLATOR REPLACEMENT
Block Diagram
Table 1. Pin Descriptions
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Number
Name
Type
Description
1, 2
M1, M0
Input
Pullup
Feedback divider control inputs. Sets the feedback divider value to one of four
values: ÷32, ÷25, ÷24, or ÷20 (see Table 3A). LVCMOS/LVTTL interface levels.
3VEE
Power
Negative supply pin.
4, 5
XTAL_IN
XTAL_OUT
Input
Crystal oscillator interface XTAL_IN is the input, XTAL_OUT is the output. This
oscillator interface can also be driven by a single-ended or differential reference
clock.
6, 7
Q, nQ
Output
Differential output pair. LVPECL interface levels.
8VCC
Power
Power supply pin.
9, 10
N1, N0
Input
Pullup
Output divider control inputs. Sets the output divider value to one of four values:
÷3, ÷4, ÷5, or ÷6 (see Table 3B). LVCMOS/LVTTL interface levels.
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
CIN
Input Capacitance
3.5
pF
RPULLUP
Input Pullup Resistor
51
k
Q
nQ
Phase Detector
OSC
FemtoClock VCO
500MHz – 640MHz
Output Divider
N[1:0]
Value
00
÷6
01
÷3
10
÷4
11
÷5 (default)
M1 M0
M Value
0
÷32
0
1
÷24
1
0
÷20
1
÷25 (default)
Pullup
N0
N1
XTAL_IN
XTAL_OUT
M1
M0
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