參數(shù)資料
型號(hào): ICS84021AYLFT
廠商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 10/19頁(yè)
文件大?。?/td> 0K
描述: IC SYNTHESIZER HIGH FREQ 32-LQFP
標(biāo)準(zhǔn)包裝: 1,000
系列: HiPerClockS™
類型: 頻率合成器
PLL: 帶旁路
輸入: LVCMOS,LVTTL,晶體
輸出: LVCMOS,LVTTL
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 無(wú)/無(wú)
頻率 - 最大: 260MHz
除法器/乘法器: 是/無(wú)
電源電壓: 3.135 V ~ 3.465 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 32-LQFP
供應(yīng)商設(shè)備封裝: 32-TQFP(7x7)
包裝: 帶卷 (TR)
其它名稱: 84021AYLFT
ICS84021 Data Sheet
260MHz, CRYSTAL-TO-LVCMOS/LVTTL FREQUENCY SYNTHESIZER
ICS84021BY REVISION E AUGUST 18, 2011
18
2011 Integrated Device Technology, Inc.
Revision History Sheet
Rev
Table
Page
Description of Change
Date
B
T2
4
12
Pin Characteristics Table - added ROUT rows.
Added Schematic Layout.
Changed XTAL naming convention to XTAL_IN/XTAL_OUT throughout the data sheet.
1/5/04
C
T6
T10
1
2
7
15
Features Section - added Lead-Free bullet.
Updated Parallel & Serial Load Operations Diagram.
Crystal Characteristics Table - added Drive Level.
Ordering Information Table - added Lead-Free package.
6/9/05
D
T4A
T6
T7A - T7C
T10
1
6
7
8 - 10
11
12
13
14
17
Features section - updated RMS period jitter spec in bullet; added RMS phase jitter bullet.
Block Diagram - added pullups/pulldowns to input pins and added “N” in output divider box.
Absolute Maximum Ratings - updated Inputs, VI.
Power Supply DC Characteristics - updated VDDA, IDD, IDDA and IDDO specs.
Crystal Characteristics - deleted Drive Level row.
Updated Period Jitter, Output Rise/Fall Time and Output Duty Cycle specs. Added thermal
note.
Parameter Measurement Information - corrected Output Load AC Test Circuit diagrams to
coincide with 15
V
DDA.
Added Recommendations for Unused Input & Output Pins.
Deleted Power Supply Filtering Techniques section, added to schematic layout.
Added Overdriving the XTAL Interface section.
Updated Layout Guideline and diagram.
Ordering Information Table - updated Part/Order Numbers and Marking to revision “B”.
Converted datasheet format.
1/5/11
E
T7A
8
13
AC Characteristics Table - corrected Period Jitter N = 4 spec, from 32.2ps max. to 34.2ps
max.
Deleted Crystal Input Interface section, added to the schematic.
8/18/11
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