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參數(shù)資料
| 型號(hào)： | ICS9342 |
| 英文描述： | 133MHz Clock Generator and Integrated Buffer for PowerPC⑩ |
| 中文描述： | 133MHz的時(shí)鐘發(fā)生器和集成緩沖器，用于PowerPC的⑩ |
| 文件頁(yè)數(shù)： | 4/10頁(yè) |
| 文件大?。?/td> | 175K |
| 代理商： | ICS9342 |
ICS9342
Third party brands and names are the property of their respective owners.
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0 V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND
–
0.5 V to V
DD
+0.5 V
Ambient Operating Temperature . . . . . . . . . . . . . -40
°
C to +85
°
C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . .
–
65
°
C to +150
°
C
Stresses above those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. These ratings are
stress specifications only and functional operation of the device at these or any other conditions above those listed in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect product reliability.
Electrical Characteristics - Input/Supply/Common Output Parameters
T
A
= 0 - 70
o
C; Supply Voltage V
DD
= 3.3 V +/-5% (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
Input High Voltage
V
IH
Input Low Voltage
V
IL
Input High Current
I
IH
V
IN
= V
DD
Input Low Current
I
IL1
V
IN
= 0 V; Inputs with no pull-up resistors
Input Low Current
I
IL2
V
IN
= 0 V; Inputs with pull-up resistors
I
DD3.3OP66
Select @ 66MHz; Max discrete cap loads
Operating
I
DD3.3OP83
Select @ 83MHz; Max discrete cap loads
Supply Current
I
DD3.3OP100
Select @ 100MHz; Max discrete cap loads
I
DD3.3OP133
Select @ 133MHz; Max discrete cap loads
Power Down
Supply Current
Input frequency
F
i
V
DD
= 3.3 V
C
IN
Logic Inputs
C
INX
X1 & X2 pins
Transition Time
1
T
Trans
To 1st crossing of target Freq.
Settling Time
1
T
S
From 1st crossing to 1% target Freq.
Clk Stabilization
1
T
STAB
From V
DD
= 3.3 V to 1% target Freq.
Skew
1
t
CPU-PCI
V
T
= 1.5 V
MIN
2
V
SS
-0.3
TYP
MAX
V
DD
+0.3
0.8
5
UNITS
V
V
μ
A
μ
A
μ
A
0.1
2.0
-100
134
165
198
254
-5
-200
175
200
225
300
12
14.318
16
5
22.5
3
MHz
pF
pF
ms
ms
ms
ps
13.5
18
1
3
190
500
Input Capacitance
1
mA
PD# = 0
I
DD3.3PD
313
400
μ
A
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS9342AFLF | 制造商:Integrated Device Technology Inc 功能描述: |
| ICS9342YF-T | 制造商:ICS 制造商全稱:ICS 功能描述:133MHz Clock Generator and Integrated Buffer for PowerPC⑩ |
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| ICS93701YGT | 制造商:ICS 制造商全稱:ICS 功能描述:DDR Phase Lock Loop Clock Driver |
| ICS93705 | 制造商:ICS 制造商全稱:ICS 功能描述:DDR Phase Lock Loop Zero Delay Clock Buffer |
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