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| 型號： | ICS9342 |
| 英文描述： | 133MHz Clock Generator and Integrated Buffer for PowerPC⑩ |
| 中文描述： | 133MHz的時(shí)鐘發(fā)生器和集成緩沖器，用于PowerPC的⑩ |
| 文件頁數(shù)： | 5/10頁 |
| 文件大小： | 175K |
| 代理商： | ICS9342 |
ICS9342
Third party brands and names are the property of their respective owners.
Electrical Characteristics - PCI
T
A
= 0 - 70
o
C; V
DD
= 3.3 V +/-5%; C
L
=30 pF
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Output Impedance
Output Impedance
Output High Voltage
Output Low Voltage
Output High Current
Output Low Current
Rise Time
1
Fall Time
1
Duty Cycle
1
Jitter, Cycle-to-cycle
1
R
DSP1
R
DSN1
V
OH1
V
OL1
I
OH1
I
OL1
t
r1
t
f1
d
t1
t
jcyc-cyc1
1
V
O
= V
DD
*(0.5)
V
O
= V
DD
*(0.5)
I
OH
= -11 mA
I
OL
= 9.4 mA
V
OH
= 2.0 V
V
OL
= 0.8 V
V
OL
= 0.4 V, V
OH
= 2.4 V
V
OH
= 2.4 V, V
OL
= 0.4 V
V
T
= 1.5 V
V
T
= 1.5 V
12
12
2.4
21
21.2
55
55
1
0.17
-60
47
1
0.9
50
170
0.4
-22
V
mA
mA
ns
ns
%
ps
25
0.5
0.5
45
2
2
55
500
1
Guaranteed by design, not 100% tested in production.
Electrical Characteristics - CPU
T
A
= 0 - 70
o
C; V
DD
= 3.3 V +/-5%; C
L
= 20 pF (unless otherwise stated)
PARAMETER
SYMBOL
1
CONDITIONS
MIN
TYP
MAX
UNITS
Output Impedance
R
DSP2B
V
O
= V
DD
*(0.5)
13.5
20
45
V
V
Output Impedance
Output High Voltage
Output Low Voltage
Output High Current
Output Low Current
Rise Time
Fall Time
R
DSN2B
V
OH2B
V
OL2B
I
OH2B
I
OL2B
t
r2B1
t
f2B1
1
V
O
= V
DD
*(0.5)
I
OH
= -8.0 mA
I
OL
= 12 mA
V
OH
=1.7 V
V
OL
= 0.7 V
V
OL
= 0.4 V, V
OH
= 2.4 V
V
OH
= 2.4 V, V
OL
= 0.4 V
VT = 1.5 V; Cpu@ 66M, 83M, 100M
VT = 1.5 V; Cpu@133M & 146.6M
VT = 1.5 V
VT = 1.5 V; Normal
VT = 1.5 V; Spread, CPU = 91.58MHz
VT = 1.5 V; Spread, CPU remaining freq.
13.5
2
29
2.4
0.32
-37
26
1.13
1.27
52
56
187
95
143
143
45
0.4
-16
mA
mA
ns
ns
19
2
2
45
51
56
60
200
150
200
175
Skew
t
sk2B
1
ps
1
Guaranteed by design, not 100% tested in production.
Duty Cycle
d
t2B1
%
Jitter, Cycle-to-cycle
tj
cyc-cyc2B
1
ps
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS93701 | DDR Phase Lock Loop Clock Driver |
| ICS93701YGT | DDR Phase Lock Loop Clock Driver |
| ICS93705 | DDR Phase Lock Loop Zero Delay Clock Buffer |
| ICS93705YF-T | DDR Phase Lock Loop Zero Delay Clock Buffer |
| ICS93712YF-PPP-T | 2 DIMM DDR Fanout Buffer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS9342AFLF | 制造商:Integrated Device Technology Inc 功能描述: |
| ICS9342YF-T | 制造商:ICS 制造商全稱:ICS 功能描述:133MHz Clock Generator and Integrated Buffer for PowerPC⑩ |
| ICS93701 | 制造商:ICS 制造商全稱:ICS 功能描述:DDR Phase Lock Loop Clock Driver |
| ICS93701YGT | 制造商:ICS 制造商全稱:ICS 功能描述:DDR Phase Lock Loop Clock Driver |
| ICS93705 | 制造商:ICS 制造商全稱:ICS 功能描述:DDR Phase Lock Loop Zero Delay Clock Buffer |
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