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參數(shù)資料
| 型號： | ICS9342 |
| 英文描述： | 133MHz Clock Generator and Integrated Buffer for PowerPC⑩ |
| 中文描述： | 133MHz的時鐘發(fā)生器和集成緩沖器，用于PowerPC的⑩ |
| 文件頁數(shù)： | 6/10頁 |
| 文件大?。?/td> | 175K |
| 代理商： | ICS9342 |
ICS9342
Third party brands and names are the property of their respective owners.
Electrical Characteristics - REF, OUT, OUT/2
T
A
= 0 - 70
o
C; V
DD
= 3.3 V +/-5%; C
L
= 20 pF (unless otherwise stated)
SYMBOL
R
DSP51
R
DSN51
V
OH5
V
OL5
I
OH5
I
OL5
Rise Time
1
t
r5
Fall Time
1
t
f5
Duty Cycle
1
d
t5
Rise Time
1
t
r5
Fall Time
1
t
f5
Duty Cycle
1
d
t5
Rise Time
1
t
r5
Fall Time
1
t
f5
Duty Cycle
1
d
t5
t
jcyc-cyc5
t
jcyc-cyc5
1
Guaranteed by design, not 100% tested in production.
CONDITIONS
MIN
TYP
MAX
UNITS
V
O
= V
DD
*(0.5)
20
34
60
V
V
V
O
= V
DD
*(0.5)
I
OH
= -12 mA
I
OL
= 10 mA
V
OH
= 2.0 V
V
OL
= 0.8 V
20
2.4
31
2.9
0.33
-30
23
60
0.4
-20
mA
mA
16
V
OL
= 0.4 V, V
OH
= 2.4 V; OUT
1.5
1.8
4
ns
V
OH
= 2.4 V, V
OL
= 0.4 V; OUT
1.5
2
4
ns
V
T
= 1.5 V; OUT
45
52
55
%
V
OL
= 0.4 V, V
OH
= 2.4 V; OUT/2
1.5
2.2
4
ns
V
OH
= 2.4 V, V
OL
= 0.4 V; OUT/2
1.5
2.1
4
ns
V
T
= 1.5 V; OUT/2
45
50
55
%
V
OL
= 0.4 V, V
OH
= 2.4 V; REF
1.5
2.7
4
ns
V
OH
= 2.4 V, V
OL
= 0.4 V; REF
1.5
2.8
4
ns
V
T
= 1.5 V; REF
V
T
= 1.5 V; OUT, OUT/2
V
T
= 1.5 V; REF
45
50
280
450
55
500
1000
%
ps
ps
Jitter, Cycle-to-cycle1
Jitter, Cycle-to-cycle
1
PARAMETER
Output Low Voltage
Output High Current
Output Low Current
Output High Voltage
Output Impedance
REF
OUT
OUT/2
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PDF描述 |
|---|---|
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| ICS93701YGT | DDR Phase Lock Loop Clock Driver |
| ICS93705 | DDR Phase Lock Loop Zero Delay Clock Buffer |
| ICS93705YF-T | DDR Phase Lock Loop Zero Delay Clock Buffer |
| ICS93712YF-PPP-T | 2 DIMM DDR Fanout Buffer |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ICS9342AFLF | 制造商:Integrated Device Technology Inc 功能描述: |
| ICS9342YF-T | 制造商:ICS 制造商全稱:ICS 功能描述:133MHz Clock Generator and Integrated Buffer for PowerPC⑩ |
| ICS93701 | 制造商:ICS 制造商全稱:ICS 功能描述:DDR Phase Lock Loop Clock Driver |
| ICS93701YGT | 制造商:ICS 制造商全稱:ICS 功能描述:DDR Phase Lock Loop Clock Driver |
| ICS93705 | 制造商:ICS 制造商全稱:ICS 功能描述:DDR Phase Lock Loop Zero Delay Clock Buffer |
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