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參數(shù)資料
| 型號(hào)： | ICSSSTUB32872A |
| 英文描述： | 28-Bit Registered Buffer for DDR2 |
| 中文描述： | 28位注冊(cè)緩沖DDR2內(nèi)存 |
| 文件頁(yè)數(shù)： | 18/18頁(yè) |
| 文件大?。?/td> | 222K |
| 代理商： | ICSSSTUB32872A |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)當(dāng)前第18頁(yè)
18
1222F—3/13/07
ICSSSTUB32872A
Advance Information
Revision History
Rev.
A
Issue Date
5/2/2006
Description
Initial Release.
Electrical table, Ci Data input max changed from 3.5 to 5.0, CLK max
changed from 3 to 3.8
Timing table, ts Data before CK changed from 0.5 to 0.7, th DCS after CK
changed from 0.5 to 0.6
Page #
-
B
12/12/2006
11
C
12/20/2006
12
D
12/21/2006
Applications, removed "800"; Electrical table, Idd Operating max changed
from 80 to 150, Ci RESET typ changed from 2.5 to 4.5; Timing table, th Hold
Time, changed Q to Dn, Switching table, changed tpdm max from 1.7 to 1.9,
thl min from 1 to 0.9, and tpdmss max from 1.9 to 2.
1, 11, 12
E
3/6/2007
Timing table, ts Data before CK changed from 0.7 to 0.6; Switching table,
fixed typos.
Page 1, Recc. List, changed 3rd bullet to "Provides complete DDR DIMM
solution with ICS98ULPA877A, ICS97ULP877, or IDTCSPUA877A"; page 11,
fixed typos.
12
F
3/13/2007
1, 11
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相關(guān)代理商/技術(shù)參數(shù) |
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| ICSSSTUBF32866A | 制造商:ICS 制造商全稱:ICS 功能描述:25-Bit Configurable Registered Buffer for DDR2 |
| ICSSSTUBF32866AZ(LF)T | 制造商:ICS 制造商全稱:ICS 功能描述:25-Bit Configurable Registered Buffer for DDR2 |
| ICSSSTUF32864A | 制造商:ICS 制造商全稱:ICS 功能描述:25-Bit Configurable Registered Buffer for DDR2 |
| ICSSSTUF32864AYHLF-T | 制造商:ICS 制造商全稱:ICS 功能描述:25-Bit Configurable Registered Buffer for DDR2 |
| ICSSSTV16857 | 制造商:ICS 制造商全稱:ICS 功能描述:DDR 14-Bit Registered Buffer |
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