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參數(shù)資料
| 型號： | IDT723626L12PF8 |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 30/35頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FIFO SYNC 256X36X2 128QFP |
| 標準包裝： | 1,000 |
| 系列： | 7200 |
| 功能： | 同步 |
| 存儲容量： | 18.4K（256 x 36 x 2） |
| 數(shù)據速率： | 83MHz |
| 訪問時間： | 12ns |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 128-LQFP |
| 供應商設備封裝： | 128-TQFP（14x20） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | 723626L12PF8 |
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4
COMMERCIAL TEMPERATURE RANGE
IDT723626/723636/723646 CMOS TRIPLE BUS SyncFIFO
WITH BUS-MATCHING 256 x 36 x 2, 512 x 36 x 2 and 1,024 x 36 x 2
PIN DESCRIPTIONS
Symbol
Name
I/O
Description
A0-A35
Port A Data
I/O
36-bit bidirectional data port for side A.
AEA
PortAAlmost-Empty
O
Programmable Almost-Empty flag synchronized to CLKA. It is LOW when the number of words in FIFO2 is
Flag
less than or equal to the value in the Almost-Empty A Offset register, X2.
AEB
PortBAlmost-Empty
O
Programmable Almost-Empty flag synchronized to CLKB. It is LOW when the number of words in FIFO1 is
Flag
less than or equal to the value in the Almost-Empty B Offset register, X1.
AFA
Port A Almost-Full
O
Programmable Almost-Full flag synchronized to CLKA. It is LOW when the number of empty locations in
Flag
FIFO1 is less than or equal to the value in the Almost-Full A Offset register, Y1.
AFC
Port C Almost-Full
O
Programmable Almost-Full flag synchronized to CLKC. It is LOW when the number of empty locations in
Flag
FIFO2 is less than or equal to the value in the Almost-Full C Offset register, Y2.
B0-B17
Port B Data
O
18-bit output data port for side B.
BE/
FWFT
Big-Endian/
I
This is a dual purpose pin. During Master Reset, a HIGH on BE will select Big-Endian operation. In this
First Word
case, depending on the bus size, the most significant byte or word on Port A is read from Port B first (A-to-B
Fall Through
data flow) or is written to Port C first (C-to-A data flow). A LOW on BE will select Little-Endian operation.
Select
In this case, the least significant byte or word on Port A is read from Port B first (A-to-B data flow) or is
written to Port C first (C-to-A data flow).
After Master Reset, this pin selects the timing mode. A HIGH on
FWFT selects IDT Standard mode, aLOW
selects First Word Fall Through mode. Once the timing mode has been selected, the level on
FWFT must
be static throughout device operation.
C0-C17
Port C Data
I
18-bit input data port for side C.
CLKA
Port A Clock
I
CLKA is a continuous clock that synchronizes all data transfers through Port A and can be asynchronous or
coincident to CLKB.
FFA/IRA, EFA/ORA, AFA, and AEA are all synchronized to the LOW-to-HIGH
transition of CLKA.
CLKB
Port B Clock
I
CLKB is a continuous clock that synchronizes all data transfers through Port B and can be asynchronous or
coincident to CLKA.
EFB/ORB and AEB are synchronized to the LOW-to-HIGH transition of CLKB.
CLKC
Port C Clock
I
CLKC is a continuous clock that synchronizes all data transfers through Port C and can be asynchronous
or coincident to CLKA.
FFC/IRC and AFC are synchronized to the LOW-to-HIGH transition of CLKC.
CSA
Port A Chip Select
I
CSA must be LOW to enable to LOW-to-HIGH transition of CLKA to read or write on Port A. The A0-A35
outputs are in the high-impedance state when
CSA is HIGH.
CSB
Port B Chip Select
I
CSB must be LOW to enable a LOW-to-HIGH transition of CLKB to read data on Port B. The B0-B17
outputs are in the high-impedance state when
CSB is HIGH.
EFA/ORA
Port A Empty/
O
This is a dual function pin. In the IDT Standard mode, the
EFA function is selected. EFA indicates whether
Output Ready Flag
or not the FIFO2 memory is empty. In the FWFT mode, the ORA function is selected. ORA indicates the
presence of valid data on the A0-A35 outputs, available for reading.
EFA/ORA is synchronized to the
LOW-to-HIGH transition of CLKA.
EFB/ORB
Port B Empty/
O
This is a dual function pin. In the IDT Standard mode, the
EFB function is selected. EFB indicates whether
Output Ready Flag
or not the FIFO1 memory is empty. In the FWFT mode, the ORB function is selected. ORB indicates the
presence of valid data on the B0-B17 outputs, available for reading.
EFB/ORB is synchronized to the
LOW-to-HIGH transition of CLKB.
ENA
Port A Enable
I
ENA must be HIGH to enable a LOW-to-HIGH transition of CLKA to read or write data on Port A.
FFA/IRA
Port A Full/
O
This is a dual function pin. In the IDT Standard mode, the
FFA function is selected. FFA indicates whether
Input Ready Flag
or not the FIFO1 memory is full. In the FWFT mode, the IRA function is selected. IRA
indicates whether or not there is space available for writing to the FIFO1 memory.
FFA/IRA is
synchronized to the LOW-to-HIGH transition of CLKA.
FFC/IRC
Port C Full/
O
This is a dual function pin. In the IDT Standard mode, the
FFC function is selected. FFC indicates whether
Input Ready Flag
or not the FIFO2 memory is full. In the FWFT mode, the IRC function is selected. IRC indicates whether or
not there is space available for writing to the FIFO2 memory.
FFC/IRC is synchronized to the
LOW-to-HIGH transition of CLKC.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| IDT723626L15PF | 功能描述:IC FIFO SYNC 256X36X2 128QFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標準包裝:90 系列:7200 功能:同步 存儲容量:288K（16K x 18） 數(shù)據速率:100MHz 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應商設備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF |
| IDT723626L15PF8 | 功能描述:IC FIFO SYNC 256X36X2 128QFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標準包裝:90 系列:7200 功能:同步 存儲容量:288K（16K x 18） 數(shù)據速率:100MHz 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應商設備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF |
| IDT723631L15PF | 功能描述:IC FIFO SYNC 512X36 120-TQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標準包裝:90 系列:7200 功能:同步 存儲容量:288K（16K x 18） 數(shù)據速率:100MHz 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應商設備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF |
| IDT723631L15PF8 | 功能描述:IC FIFO SYNC 512X36 120-TQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標準包裝:90 系列:7200 功能:同步 存儲容量:288K（16K x 18） 數(shù)據速率:100MHz 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應商設備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF |
| IDT723631L15PFG | 制造商:Integrated Device Technology Inc 功能描述:IC FIFO SYNC 512X36 120-TQFP |
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