參數(shù)資料
型號(hào): IDT72T36125L5BBI
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 57/57頁
文件大?。?/td> 0K
描述: IC FIFO 524X18 5NS 240BGA
標(biāo)準(zhǔn)包裝: 1
系列: 72T
功能: 異步,同步
存儲(chǔ)容量: 9.4K(524 x 18)
數(shù)據(jù)速率: 83MHz
訪問時(shí)間: 5ns
電源電壓: 2.375 V ~ 2.625 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 240-BGA
供應(yīng)商設(shè)備封裝: 240-PBGA(19x19)
包裝: 托盤
其它名稱: 72T36125L5BBI
9
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
IDT72T3645/55/65/75/85/95/105/115/125 2.5V TeraSync
36-BIT FIFO
1K x 36, 2K x 36, 4K x 36, 8K x 36, 16K x 36, 32K x 36, 64K x 36, 128K x 36 and 256K x 36
FEBRUARY 4, 2009
NOTES:
1. Inputs should not change state after Master Reset.
2. These pins are for the JTAG port. Please refer to pages 31-34 and Figures 6-8.
WHSTL(1) Write Port HSTL
LVTTL
This pin is used to select HSTL or 2.5V LVTTL inputs for the FIFO. If HSTL inputs are required, this input must
Select
INPUT
be tied HIGH. Otherwise it should be tied LOW.
Vcc
+2.5v Supply
I
These are Vcc supply inputs and must be connected to the 2.5V supply rail.
GND
Ground Pin
I
These are Ground pins an dmust be connected to the GND rail.
Vref
Reference
I
This is a Voltage Reference input and must be connected to a voltage level determined from the table,
Voltage
“Recommended DC Operating Conditions”. This provides the reference voltage when using HSTL class
inputs. If HSTL class inputs are not being used, this pin should be tied LOW.
VDDQ
O/P Rail Voltage
I
This pin should be tied to the desired voltage rail for providing power to the output drivers.
PIN DESCRIPTION (CONTINUED)
Symbol
Name
I/O TYPE
Description
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