參數(shù)資料
型號(hào): IDT77105L25TFI
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 數(shù)字傳輸電路
英文描述: PHY (TC-PMD) for 25.6 Mbps ATM Networks
中文描述: ATM NETWORK INTERFACE, PQFP64
封裝: 10 X 10 MM, STQFP-64
文件頁(yè)數(shù): 4/24頁(yè)
文件大?。?/td> 335K
代理商: IDT77105L25TFI
4 of 24
September 11, 2000
IDT77105
Output Parameters for Transmit Line Signal @ Vcc = 5V ± 10%
Input Parameters for IDT77105 Receive Line Signal
Capacitance (T
A
= +25
°
C, f = 1MHz)
Pin Description
Pin
Name
Symbol
Parameter
Min.
Typ.
Max.
Unit
Voh
Output High Voltage for Transmit Line Signal, Ioh = 8mA Vcc - 0.5V —
V
Vol
Output Low Voltage for Transmit Line Signal, Ioh = 8mA —
0.5
V
Ioh
Output High Current for Transmit Line Signal
80
mA
Iol
Output Low Current for Transmit Line Signal
75
mA
Z
OUT
Output Impedance
20
Ohm
Symbol
Parameter
Min.
Typ.
Max.
Unit
I
LI
Input Leakage Current
1
Input Capacitance
2
1.
Input Voltage = 2.5V (typ) ± 600mV
2.
Measured with f=1MHz
-1
1
μA
C
IN
10
pF
Symbol
C
IN
1
Parameter
Conditions
Max.
Unit
1.
Characterized values, not currently tested.
Output Capacitance
V
IN
= 0V
10
pF
C
OUT
1
Input Capacitance
V
OUT
= 0V
10
pF
I/O
Interfaces to
Description
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
ALE
WRB
V
CC
RDB
V
CC
RxD+
VCC
RxD-
V
CC
DNC
UPLO
PLL_Filter_2
RxLED
TxLED
PLL_Filter_1
TXD–
DNC
TxD+
GND
TxOsc
GND
I
I
I
I
I
O
O
O
O
O
O
I
Utility bus
Utility bus
Power Plane
Utility bus
Address Latch Enable signal. The falling edge of ALE is used to latch the address on AD[7:0].
Write Byte Enable (active low).
Read Byte Enable (active low).
Reserved input
Positive Differential receive serial data input.
Reserved input
Negative Differential receive serial data input.
Reserved input
NOTE: This pin should float.
User Programmed Latched Output of Reg 0, bit 7 (opposite polarity).
(See Figure 20).
LED driver output (see Figure 8). Pulses low when a cell is being received.
LED driver output (see Figure 8). Pulses low when a cell is being transmitted
(See Figure 20).
Differential Negative transmit serial data output.
NOTE: This pin should float.
Differential Positive transmit serial data output.
Magnetics
Magnetics
N/A
User defined
Discrete Capacitor
LED
LED
Discrete Capacitor
Magnetics
N/A
Magnetics
Ground plane
OSC
Ground plane
Input from an external clock oscillator. 32MHz for 25.6 Mbps; ±100ppm
Table 1 Pin Description (Part 1 of 2)
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