- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377484 > IDT77V1254L25 (Integrated Device Technology, Inc.) Quad Port PHY (Physical Layer) for 25.6 and 51.2 ATM Networks PDF資料下載
參數(shù)資料
| 型號： | IDT77V1254L25 |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | Quad Port PHY (Physical Layer) for 25.6 and 51.2 ATM Networks |
| 中文描述： | 四端口PHY（實體層）為25.6和51.2 ATM網(wǎng)絡(luò) |
| 文件頁數(shù)： | 27/47頁 |
| 文件大?。?/td> | 840K |
| 代理商： | IDT77V1254L25 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁當(dāng)前第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁
27 of 47
September 21, 2001
IDT77V1254L25
Overall interrupt control is provided via bit 0 of the Master Control Registers. When this bit is cleared (set to 0), interrupt signalling is prevented on
the respective port. The Interrupt Mask Registers allow
individual masking of different interrupt sources. Additional interrupt signal control is provided
by bit 5 of the Master Control Registers. When this bit is set (=1), receive cell errors will be flagged via interrupt signalling and all other interrupt condi-
tions are masked. These errors include:
Bad receive HEC
Short (fewer than 53 bytes) cells
Received cell symbol error
Normal interrupt operations are performed by setting bit 0 and clearing bit 5 in the Master Control Registers. INT (pin 85) will go to a low state
when an interrupt condition is detected. The external system should then interrogate the 77V1254L25 to determine which one (or more) conditions
caused this flag, and reset the interrupt for further occurrences. This is accomplished by reading the Interrupt Status Registers. Decoding the bits in
these bytes will tell which error condition caused the interrupt. Reading these registers also:
clears the (sticky) interrupt status bits in the registers that are read
resets INT
This leaves the interrupt system ready to signal an alarm for further problems.
LED Control and Signaling
The LED outputs provide bi-directional LED drive capability of 8 mA. As an example, the RXLED outputs are described in the truth table:
As illustrated in the following drawing (Figure 31), this could be connected to provide for a two-LED condition indicator. These could also be
different colors to provide simple status indication at a glance. (The minimum value for R should be 330
).
TXLED Truth Table
Diagnostic Function
Figure 31 LED Indicator
State
Pin Voltage
Cells being received
Low
Cells not being received
High
State
Pin Voltage
Cells being transmitted
Low
Cells not being transmitted High
(E
E
C
)45.08 08
0546 0.0510
4850
)45.08 08 0
4 0546 0.0510
4850
(
(
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT77V1254L25L25PG | Quad Port PHY (Physical Layer) for 25.6 and 51.2 ATM Networks |
| IDT79RC64V475250DZ | RISControllerTM Embedded 64-bit Microprocessor, based on RISCore4000 |
| IDT79RC64V475250DZI | RISControllerTM Embedded 64-bit Microprocessor, based on RISCore4000 |
| IDT79RC64V474180DZI | RISControllerTM Embedded 64-bit Microprocessor, based on RISCore4000 |
| IDT79RC64V475180DZI | RISControllerTM Embedded 64-bit Microprocessor, based on RISCore4000 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT77V252L155PG | 制造商:Integrated Device Technology Inc 功能描述:ATM/SONET SEGMENTATION AND REASSEMBLY CIRCUIT, 208 Pin, Plastic, QFP |
| IDT77V400S156BC | 功能描述:IC SW MEMORY 8X8 1.2BGPS 256-BGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:SwitchStar™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
| IDT77V400S156BCG | 功能描述:IC SW MEMORY 8X8 1.2BGPS 256-BGA RoHS:是 類別:集成電路 (IC) >> 專用 IC 系列:SwitchStar™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
| IDT77V400S156DS | 功能描述:IC SW MEMORY 8X8 1.2BGPS 208PQFP RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:SwitchStar™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
| IDT77V500S25BC | 功能描述:IC SW MEMORY 8X8 1.2BGPS 144-BGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:SwitchStar™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。