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IDT82V3010
T1/E1/OC3 Telecom Clock Generator with Dual Reference Inputs
List of Figures
5
June 19, 2006
LIST OF FIGURES
Figure - 1
Figure - 2
Figure - 3
Figure - 4
Figure - 5
Figure - 6
Figure - 7
Figure - 8
Figure - 9
Figure - 10
Figure - 11
Figure - 12
Figure - 13
Figure - 14
Figure - 15
IDT82V3010 SSOP56 Package Pin Assignment................................................................................................................................ 2
State Control Circuit............................................................................................................................................................................ 9
State Control Diagram......................................................................................................................................................................... 9
TIE Control Block Diagram................................................................................................................................................................ 11
Reference Switch with TIE Control Block Enabled............................................................................................................................ 12
Reference Switch with TIE Control Block Disabled........................................................................................................................... 12
DPLL Block Diagram......................................................................................................................................................................... 13
Clock Oscillator Circuit...................................................................................................................................................................... 14
Power-Up Reset Circuit..................................................................................................................................................................... 14
IDT82V3010 Power Decoupling Scheme.......................................................................................................................................... 15
Timing Parameter Measurement Voltage Levels.............................................................................................................................. 26
Input to Output Timing (Normal Mode).............................................................................................................................................. 28
Output Timing 1................................................................................................................................................................................. 29
Output Timing 2................................................................................................................................................................................. 30
Input Control Setup and Hold Timing................................................................................................................................................ 30