參數(shù)資料
型號: IDT8535-01PGG8
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘及定時
英文描述: 8535 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 4 INVERTED OUTPUT(S), PDSO20
封裝: GREEN, TSSOP-16
文件頁數(shù): 2/11頁
文件大小: 85K
代理商: IDT8535-01PGG8
10
COMMERCIALANDINDUSTRIALTEMPERATURERANGES
IDT8535-01
LOW SKEW, 1-TO-4 LVCMOS-TO-3.3V LVPECL
CALCULATIONS AND EQUATIONS
VDD
Q1
VOUT
RL
50
VDD - 2V
LVPECL Output Driver Circuit and Termination
To calculate worst case power dissipation into the load, use the following equations, which assume a 50
Ω load and a termination voltage of VDD – 2V.
For Logic HIGH: VOUT = VOH_MAX = VDD_MAX – 1V.
(VDD_MAX – VOH_MAX) = 1V
For Logic LOW: VOUT = VOL_MAX = VDD_MAX – 1.7V.
(VDD_MAX – VOL_MAX) = 1.7V
Pd_H is power dissipation when the output drives HIGH.
Pd_L is power dissipation when the output drives LOW.
Pd_H = {[ VOH_MAX – (VDD_MAX – 2V)] / RL} * (VDD_MAX – VOH_MAX) = {[ 2V – (VDD_MAX – VOH_MAX)] / RL} * (VDD_MAX – VOH_MAX) = [( 2V – 1V) / 50
Ω] *
1V = 20mW.
Pd_L = {[ VOL_MAX – (VDD_MAX – 2V)] / RL} * (VDD_MAX – VOL_MAX) = {[ 2V – (VDD_MAX – VOL_MAX)] / RL} * (VDD_MAX – VOL_MAX) = [( 2V – 1.7V) / 50
Ω] *
1.7V = 10.2mW.
Total Power Dissipation per output pair = Pd_H + Pd_L = 30.2mW
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