參數(shù)資料
型號(hào): IDT8535-01PGG8
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時(shí)鐘及定時(shí)
英文描述: 8535 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 4 INVERTED OUTPUT(S), PDSO20
封裝: GREEN, TSSOP-16
文件頁數(shù): 5/11頁
文件大?。?/td> 85K
代理商: IDT8535-01PGG8
3
COMMERCIALANDINDUSTRIALTEMPERATURERANGES
IDT8535-01
LOW SKEW, 1-TO-4 LVCMOS-TO-3.3V LVPECL
CONTROL INPUT FUNCTION TABLE(1,2)
Inputs
Outputs
CLK_EN
CLK_SEL
Selected Source
Q0 to Q3
xQ0 to xQ3
0
CLK0
Disabled; LOW
Disabled; HIGH
0
1
CLK1
Disabled; LOW
Disabled; HIGH
1
0
CLK0
Enabled
1
CLK1
Enabled
NOTES:
1. After CLK_EN switches, the clock outputs are disabled or enabled following a rising and falling input clock edge as shown in the CLK_EN Timing Diagram below.
2. In active mode, the state of the outputs is a function of the CLK / xCLK and PCLK / xPCLK inputs as described in the Clock Input Function table.
CLOCK INPUT FUNCTION TABLE(1)
Inputs
Outputs
CLK0 or CLK1
Q0 to Q3
xQ0 to xQ3
0L
H
1H
L
NOTE:
1. H = HIGH
L = LOW
CLK_EN
CLK0, CLK1
xQ0, xQ1, xQ2, xQ3
Disabled
Enabled
Q0, Q1, Q2, Q3
CLK_EN Timing Diagram
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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