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參數(shù)資料
| 型號： | IDT88P8342BHI |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 16/98頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SPI3-SPI4 EXCHANGE 820-PBGA |
| 標準包裝： | 24 |
| 系列： | * |
| 其它名稱： | 88P8342BHI |
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IDT88P8342 SPI EXCHANGE 2 x SPI-3 TO SPI-4
INDUSTRIALTEMPERATURERANGE
APRIL 10, 2006
4. DATAPATH AND FLOW CONTROL
The following sections describe the datapaths through the device. The
datapaths shown are as follows:
- SPI-3A <-> SPI-4
- SPI-3B <-> SPI-4
- SPI-3A <-> SPI-3B
- SPI-3A <-> microprocessor interface
- SPI-3B <-> microprocessor interface
- SPI-4 <-> microprocessor interface
Where <-> indicates a bidirectional data path.
TheIDT88P8342supportstwoSPI-3interfacesandasingleSPI-4interface.
Both SPI-3 interfaces can operate independently in a PHY or Link mode. Refer
to Figure 11, Definition of Data Flows for the main data flows in the device.
Independent logical data flows are transported over each of the physical ports.
Those logical flows are identified by logical port addresses on the physical port
and by a Link identification (LID) map in the core of the IDT88P8342.
DATA BUFFER ALLOCATION
Flexibilityhasbeenprovidedtotheuserfordatabufferallocation.Thedevice
has128KByteofonchipmemoryperSPI-3portperdirection–atotalof1MByte
of on-chip data memory.
The 128 KByte SPI-3 buffers (four instantiations per device) are divided into
256 byte segments. The segments are controlled by a packet fragment
processor. The user configures the maximum number of segments per LP to
allocatetoaportandthenumberofsegmentsallocatedfromthebuffersegment
pool that will trigger the flow control mechanism. There is no limitation on the
reallocation of freed segments among logical ports, as would be present if the
memory had been allocated by a simple address mechanism.
Figure 11. Definition of data flows
6371 drwXA
SPI-3A physical port
SPI-4
to SPI-3
from SPI-3
to SPI-4
from SPI-4
SPI-3 egress
SPI-3 ingress
SPI-4 ingress
SPI-4 egress
SPI-3-4 path
SPI-4-3 path
physical
port
SPI-3B physical port
SPI-3 extract
SPI-3 insert
SPI-4 insert
SPI-4 extract
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT88P8344 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:SPI EXCHANGE 4 x SPI-3 TO SPI-4 Issue 1.0 |
| IDT88P8344BHGI | 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:是 類別:集成電路 (IC) >> 專用 IC 系列:* 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- 類型:調(diào)幀器 應用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
| IDT88P8344BHI | 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:* 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- 類型:調(diào)幀器 應用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
| IDT89H10T4BG2ZBBC | 制造商:Integrated Device Technology Inc 功能描述:IC PCI SW 10LANE 4PORT 324BGA |
| IDT89H10T4BG2ZBBC8 | 制造商:Integrated Device Technology Inc 功能描述:IC PCI SW 10LANE 4PORT 324BGA |
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