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參數(shù)資料
| 型號： | IDT89HPES32T8ZHBXG |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 37/37頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PCI SW 32LANE 8PORT 500-SBGA |
| 標準包裝： | 27 |
| 系列： | PRECISE™ |
| 類型： | PCI Express 開關 - Gen1 |
| 應用： | 服務器，儲存，通信，嵌入式，消費品 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 500-LBGA |
| 供應商設備封裝： | 500-SBGA（31x31） |
| 包裝： | 托盤 |
| 其它名稱： | 89HPES32T8ZHBXG |
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March 25, 2008
IDT 89PES32T8 Data Sheet
P45MERGEN
I
Port 4 and 5 Merge. P45MERGEN is an active low signal. It is pulled low
internally via a 251K ohm resistor.
When this pin is low, port 4 is merged with port 5 to form a single x8 port.
The Serdes lanes associated with port 5 become lanes 4 through 7 of port
4. When this pin is high, port 4 and port 5 are not merged, and each oper-
ates as a single x4 port.
P67MERGEN
I
Port 6 and 7 Merge. P67MERGEN is an active low signal. It is pulled low
internally via a 251K ohm resistor.
When this pin is low, port 6 is merged with port 7 to form a single x8 port.
The Serdes lanes associated with port 7 become lanes 4 through 7 of port
6. When this pin is high, port 6 and port 7 are not merged, and each oper-
ates as a single x4 port.
PERSTN
I
Fundamental Reset. Assertion of this signal resets all logic inside the
PES32T8 and initiates a PCI Express fundamental reset.
RSTHALT
I
Reset Halt. When this signal is asserted during a PCI Express fundamental
reset, the PES32T8 executes the reset procedure and remains in a reset
state with the Master and Slave SMBuses active. This allows software to
read and write registers internal to the device before normal device opera-
tion begins. The device exits the reset state when the RSTHALT bit is
cleared in the SWCTL register by an SMBus master.
SWMODE[3:0]
I
Switch Mode. These configuration pins determine the PES32T8 switch
operating mode. These pins should be static and not change after the
negation of PERSTN.
0x0 - Normal switch mode
0x1 - Normal switch mode with Serial EEPROM initialization
0x2 - through 0xF Reserved
Signal
Type
Name/Description
JTAG_TCK
I
JTAG Clock. This is an input test clock used to clock the shifting of data
into or out of the boundary scan logic or JTAG Controller. JTAG_TCK is
independent of the system clock with a nominal 50% duty cycle.
JTAG_TDI
I
JTAG Data Input. This is the serial data input to the boundary scan logic or
JTAG Controller.
JTAG_TDO
O
JTAG Data Output. This is the serial data shifted out from the boundary
scan logic or JTAG Controller. When no data is being shifted out, this signal
is tri-stated.
JTAG_TMS
I
JTAG Mode. The value on this signal controls the test mode select of the
boundary scan logic or JTAG Controller.
JTAG_TRST_N
I
JTAG Reset. This active low signal asynchronously resets the boundary
scan logic and JTAG TAP Controller. An external pull-up on the board is
recommended to meet the JTAG specification in cases where the tester
can access this signal. However, for systems running in functional mode,
one of the following should occur:
1) actively drive this signal low with control logic
2) statically drive this signal low with an external pull-down on the board
Table 6 Test Pins
Signal
Type
Name/Description
Table 5 System Pins (Part 2 of 2)
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| IDT89HPES34H16ZABL | 功能描述:IC PCI SW 34LANE 16PORT 1156FBGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:PRECISE™ 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- 類型:調幀器 應用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應商設備封裝:400-PBGA（27x27） 包裝:散裝 |
| IDT89HPES34H16ZABLG | 制造商:Integrated Device Technology Inc 功能描述:IC PCIE SW 34LANE 16PORT 1156BGA |
| IDT89HPES34H16ZABLGI | 制造商:Integrated Device Technology Inc 功能描述:IC PCIE SW 34LANE 16PORT 1156BGA |
| IDT89HPES34H16ZABLI | 功能描述:IC PCI SW 34LANE 16PORT 1156FBGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:PRECISE™ 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- 類型:調幀器 應用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應商設備封裝:400-PBGA（27x27） 包裝:散裝 |
| IDT89HPES34H16ZABR | 功能描述:IC PCI SW 34LANE 16PORT 1156FBGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:PRECISE™ 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- 類型:調幀器 應用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應商設備封裝:400-PBGA（27x27） 包裝:散裝 |
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