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| 型號： | IDTIDT71P71604200BQ |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | 18Mb Pipelined DDR⑩II SRAM Burst of 2 |
| 中文描述： | 35.7流水線的DDR II SRAM的突發(fā)⑩2 |
| 文件頁數(shù)： | 7/23頁 |
| 文件大?。?/td> | 241K |
| 代理商： | IDTIDT71P71604200BQ |
6.42
7
IDT71P71804 (1M x 18-Bit) 71P71604 (512K x 36-Bit)
18 Mb DDR II SRAM Burst of 2 Commercial Temperature Range
Write Desc riptions
(1,2,3)
NOTES:
1)
All byte write
(
BW
x)
signals are sampled on the rising edge of K and again on
K
. The data that is present on the data bus in the designated byte will be
latched into the input if the corresponding
BW
x is held low. The rising edge of
K will sample the first byte of the two word burst and the rising edge of
K
will
sample the second byte of the two word burst.
2) The availability of the
BW
x on designated devices is described in the pin
description table.
3) The DDRII Burst of two SRAMhas data forwarding. A read request that is
initiated on the cycle following a write request to the same address will
produce the newly written data.
Signal
BW
0
BW
1
BW
2
BW
3
Write Byte 0
L
X
X
X
Write Byte 1
X
L
X
X
Write Byte 2
X
X
L
X
Write Byte 3
X
X
X
L
6112 tbl 09
Linear Burst Sequence Table
(1)
NOTE:
1. SA
0
is the address presented giving the burst sequence a,b.
SA
0
a
b
0
0
1
1
1
0
6112 tbl 22
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| IDTIDT71P71804200BQ | 18Mb Pipelined DDR⑩II SRAM Burst of 2 |
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| IDTIDT71P71604250BQ | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:18Mb Pipelined DDR⑩II SRAM Burst of 2 |
| IDTIDT71P71804167BQ | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:18Mb Pipelined DDR⑩II SRAM Burst of 2 |
| IDTIDT71P71804200BQ | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:18Mb Pipelined DDR⑩II SRAM Burst of 2 |
| IDTIDT71P71804250BQ | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:18Mb Pipelined DDR⑩II SRAM Burst of 2 |
| IDTIDT71P79104167BQ | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:18Mb Pipelined DDR⑩II SIO SRAM Burst of 2 |
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