參數(shù)資料
型號(hào)： IDTIDT71P79804250BQ
廠商： Integrated Device Technology, Inc.
英文描述： 18Mb Pipelined DDR⑩II SIO SRAM Burst of 2
中文描述： 35.7流水線⑩二二氧化硅的DDR SRAM的爆裂2
文件頁(yè)數(shù)： 4/23頁(yè)
文件大?。?/td> 641K
代理商： IDTIDT71P79804250BQ
6.42
IDT71P79204 (2Mx8-Bit), 71P79104 (2Mx9-Bit), 71P79804 (1Mx18-Bit) 71P79604 (512Kx36-Bit)
18 Mb DDR II SIO SRAM Burst of 2 Commercial and Industrial Temperature Ranges
Pin Definitions continued
Symbol
Pin Function
Description
Doff
Input
DLL Turn Off. When lowthis input will turn off the DLL inside the device. The AC timngs wth the DLL
turned off will be different fromthose listed in this data sheet. There wll be an increased propagation delay
fromthe incidence of C and
C
to Q, or K and
K
to Q as configured. The propagation delay is not a tested
parameter but wll be simlar to the propagation delay of other SRAMdevices in this speed grade.
TDO
Output
TDO pin for JTAG.
TCK
Input
TCK pin for JTAG.
TDI
Input
TDI pin for JTAG. An internal resistor wll pull TDI to V
DD
when the pin is unconnected.
TMS
Input
TMS pin for JTAG. An internal resistor wll pull TMS to V
DD
when the pin is unconnected.
NC
No connects inside the package. Can be tied to any voltage level.
V
REF
Input
Reference
Reference Voltage input. Static input used to set the reference level for HSTL inputs and Outputs as well
as AC measurement points.
V
DD
Power
Supply
Power supply inputs to the core of the device. Should be connected to a 1.8V power supply.
V
SS
Ground
Ground for the device. Should be connected to ground of the system
V
DDQ
Power
Supply
Power supply for the outputs of the device. Should be connected to a 1.5V power supply for HSTL or
scaled to the desired output voltage.
6432 tbl 02b
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