參數(shù)資料
型號(hào)： IMST425J20S
英文描述： Peripheral IC
中文描述： 外圍芯片
文件頁(yè)數(shù)： 11/74頁(yè)
文件大?。?/td> 563K
代理商： IMST425J20S
3 System services
/ 74
11
3.9
Error, ErrorIn
The
Error
pin carries the OR’ed output of the internal Error flag and the
ErrorIn
input. If
Error
is high it
indicateseither that
ErrorIn
is high orthat anerrorwas detectedin oneof theprocesses. Aninternal error
canbe caused, for example,byarithmetic overflow,divide by zero,array bounds violationorsoftwareset-
ting the flag directly.Once set, theErrorflag isonly cleared by executingthe instruction testerr The error
is not cleared by processor reset, in order that analysis can identify any errant transputer (page 9).
Aprocesscan beprogrammedto stopif theErrorflagisset;itcannotthentransmiterroneousdatato other
processes, but processes which do not require that data can still be scheduled. Eventually all processes
which rely, directly or indirectly, on data from the process in error will stop through lack of data.
ErrorIn
does not directly affect the status of a processor in any way.
BysettingtheHaltOnErrorflagthetransputer itselfcanbeprogrammedtohaltifErrorbecomesset.IfError
becomessetafterHaltOnErrorhasbeenset, allprocesseson that transputerwillcease butwillnot neces-
sarily causeother transputersina network tohalt. SettingHaltOnErrorafterErrorwillnot causethe trans-
puterto halt;thisallowstheprocessorresetandanalysefacilitiestofunctionwith theflagsinindeterminate
states.
An alternative method of error handling is to have the errant process or transputer cause all transputers
to halt. This can be done by ‘daisy-chaining’ the
ErrorIn
and
Error
pins of a number of processors and
applying the final
Error
output signal to the
EventReq
pin of a suitably programmed master transputer.
Since the process state is preserved when stopped by an error, the master transputer can then use the
analysefunctionto debugthefault.Whenusingsuchacircuit,notethattheErrorflagisinanindeterminate
state on power up; the circuit and software should be designed with this in mind.
Error checks can be removed completely to optimise the performance of a proven program; any unex-
pected error then occurring will have an arbitrary undefined effect.
If a high priority process pre-empts a low priority one, status of the Errorand HaltOnErrorflags is saved
for thedurationof thehighpriority processandrestored atthe conclusionofit.Statusof bothflagsistrans-
mitted tothe highpriority process. Eitherflagcan be alteredinthe process withoutupsetting theerror sta-
tus of any complex operation being carried out by the pre-empted low priority process.
IntheeventofatransputerhaltingbecauseofHaltOnErrorthelinkswillfinishoutstandingtransfersbefore
shutting down. If
Analyse
is asserted then all inputs continue but outputs will not make another access
to memory for data. Memory refresh will continue to take place.
Afterhalting due totheErrorflag changingfrom 0 to 1 whilstHaltOnErroris set, register
I
pointstwo bytes
pastthe instructionwhichset Error Afterhaltingdue tothe
Analyse
pin being takenhigh, register
I
points
one byte past the instruction being executed. In both cases
I
will be copied to register
A
.
T805
slave 0
ErrorIn
Error
T400
slave 1
ErrorIn
Error
T805
slave n
ErrorIn
Error
Latch
Master
Transputer
EventReq
GND
(transputer links not shown)
Reset
Analyse
Figure 3.6
Error handling in a multi-transputer system
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