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| 型號： | intel Pentium CPU |
| 廠商： | Intel Corp. |
| 英文描述： | 32 Bit CPU With MMX Technology and Mobile Module(32位帶MMX和移動模塊處理器) |
| 中文描述： | 32位CPU的MMX技術(shù)和移動模塊（32位帶MMX公司和移動模塊處理器） |
| 文件頁數(shù)： | 24/36頁 |
| 文件大小： | 395K |
| 代理商： | INTEL PENTIUM CPU |
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INTEL PENTIUM PROCESSOR WITH MMX TECHNOLOGY MOBILE MODULE
24
1/8/98 4:35 PM 24351502.DOC
Table 13b. Typical Voltage Regulator Efficiency, VCORE = 2.0V (266 MHz)
V_DC (V)
I_DC (A)
V_5 (V) I_5 (mA)
VCORE (V)
ICORE (A)
VI/O (V)
I_I/O (mA)
Eff. (%)
4.75
0.530
5.0
14
2.00
1
2.52
100
87
4.75
1.032
5.0
14
1.99
2
2.52
100
85
4.75
1.548
5.0
14
1.99
3
2.52
100
84
4.75
2.162
5.0
14
1.99
4
2.52
100
79
12
0.220
5.0
14
2.00
1
2.52
100
83
12
0.415
5.0
14
2.00
2
2.52
100
84
12
0.624
5.0
14
2.00
3
2.52
100
82
12
0.841
5.0
14
1.99
4
2.52
100
81
21
0.128
5.0
14
2.01
1
2.52
100
82
21
0.238
5.0
14
2.00
2
2.52
100
84
21
0.355
5.0
14
2.00
3
2.52
100
83
21
0.478
5.0
41
1.99
4
2.52
100
81
NOTES:
1.
The above measured efficiencies are typical values from a limited sample size. Results may vary across
different modules.
These efficiencies will change with future voltage regulators that accommodate higher input voltages.
2.
3.4.2.
VOLTAGE REGULATOR CONTROL
The VR_ON pin on the connector allows a digital
signal (3.3V, 5V safe) to control the voltage
regulator. The system manufacturer can use this
signal to turn the
Intel Mobile Module’s voltage
regulator on or off. VR_ON should be controlled
with the same digital control signal used to control
the system’s switched 3.3V power planes. The
PIIX4 South Bridge defines Suspend B as the
power management state in which power is
physically removed from the processor, L2 cache,
430TX PCIset, and voltage regulator. In this state,
the SUSB# pin on the PIIX4 ISA bridge controls
these power planes.
From the assertion of VR_ON, the voltage
regulator
has
a
turn-on
approximately 6ms. In order to bring both the
processor’s core and I/O ring voltages up together,
the system manufacturer must ensure that the
system’s switched 3.3V supply (voltage plane
V_3S) turns on and off with the Intel Mobile
Module’s core voltage. This requires properly
sequencing of the system’s voltage regulator and
the VR_ON signal as shown in Figure 4.
time
latency
of
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