參數(shù)資料
型號： intel Pentium CPU
廠商： Intel Corp.
英文描述： 32 Bit CPU With MMX Technology and Mobile Module(32位帶MMX和移動模塊處理器)
中文描述： 32位CPU的MMX技術(shù)和移動模塊（32位帶MMX公司和移動模塊處理器）
文件頁數(shù)： 7/36頁
文件大?。?/td> 395K
代理商： INTEL PENTIUM CPU
INTEL PENTIUM PROCESSOR WITH MMX TECHNOLOGY MOBILE MODULE
7
1/8/98 4:35 PM 24351502.DOC
2.1.1.
MEMORY (108 SIGNALS)
Table 2 lists the Intel Mobile Module memory
interface signals. Some signals are defined as
“RESERVED” for future use.
Table 2. Memory Signal Descriptions
Name
Type
Voltage
Description
MPD[7:0]
I/O
V_3S
Memory Parity Data:
These signals connect to the DRAM parity.
These
pins are not implemented in the 430TX PCIset and are reserved.
*RAS[5:0]# or
CS[5:0]#
O
V_3S
Row Address Strobe (EDO):
These pins select the DRAM row.
Chip Select (SDRAM):
These pins activate the SDRAMs.
SDRAM
accepts any command when its CS# pin is active low.
*CAS[7:0]# or
DQM[7:0]
O
V_3S
Column Address Strobe (EDO):
These pins select the DRAM column.
Input/Output Data Mask (SDRAM):
These pins act as synchronized
output enables during a read cycle and as a byte mask during a write
cycle.
*MA[13:0]
O
V_3S
Memory Address (EDO/SDRAM):
This is the row and column address
for DRAM.
These buffers now include programmable size selection, as
controlled by the DRAMEC[MAD] bit.
The 430TX PCIset implements (and
the Intel Mobile Module supports) only MA[13:0].
See Figure 3 for more
details.
*MWE[A,B]#
O
V_3S
Memory Write Enable (EDO/SDRAM):
MWE[A,B]# should be used as
the write enable for the memory data bus.
Each copy is intended to
support four rows, for loading purposes.
*SRAS[A,B]#
O
V_3S
SDRAM Row Address Strobe (SDRAM):
When active low, this signal
latches Row Address on the positive edge of the clock. This signal also
allows Row access and pre-charge. Each copy is intended to support four
rows, for loading purposes.
The SRASA signal is used to configure the Mobile Mode of the 430TX
PCIset.
When the RST# signal is active, SRASA is an input.
The Intel
Mobile Module has a pull-down resistor so that SRASA is sampled low at
the rising edge of RST#;
thereby configuring the 430TX PCIset in Mobile
Mode.
*SCAS[A,B]#
O
V_3S
SDRAM Column Address Strobe (SDRAM):
When active low, this
signal latches Column Address on the positive edge of the clock.
This
signal also allows Column access. Each copy is intended to support four
rows, for loading purposes.
*CKE[A,B]#
O
V_3S
SDRAM Clock Enable (SDRAM):
SDRAM
clock enable pin.
When these
signals are de-asserted, SDRAM enters power-down mode.
Each copy is
intended to support four rows, for loading purposes.
MD[63:0]
I/O
V_3S
Memory Data:
These signals are connected to the DRAM data bus. They
are not terminated on the Intel Mobile Module and it is recommended that
the system electronics provide series termination of 33
.
* - These signals are terminated with a 22
series resistor on the Intel Mobile Module.
相關(guān)PDF資料
PDF描述
intel Pentium II processor Pentium II Processor Mobile Module(帶移動模塊奔II處理器)
INTEL386 CXSA 5-V 32-Bit Fully Static Embedded Microprocessor(5V，32位完全靜態(tài)嵌入式微處理器)
INTEL386 CXSB Low-Voltage, 32-Bit, Fully Static Embedded Microprocessor(低電壓32位完全靜態(tài)嵌入式微處理器)
intel386 DX 32-Bit CHMOS Microprocessor With Integrated Memory Management(32位CHMOS 微處理器帶集成存儲管理)
Intel386 EX Highly Integrated, 32-Bit, Fully Static Embedded Micropocessor(32位高集成完全靜態(tài)嵌入式微處理器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
INTEN I/O PCB 制造商:Sliger Designs, Inc. 功能描述:I/O PCB - Bulk
INTEN LED PCB 制造商:Sliger Designs, Inc. 功能描述:LED PCB - Bulk
INTEN-1-PROTO 制造商:Sliger Designs, Inc. 功能描述:QUANTITY TWO PROTO TYPE SHEET METAL - Bulk
INTENSI-FI 制造商:BOARDCOM 制造商全稱:Broadcom Corporation. 功能描述:DRAFT-802.11n PRODUCT FAMILY
INTER0.5 制造商:POWERDATA TECHNOLOGIES 功能描述:LEAD WIELAND TO WIELAND 0.5M
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*