參數(shù)資料
型號(hào): IS61LPS51236A-250TQI
廠商: INTEGRATED SILICON SOLUTION INC
元件分類: DRAM
英文描述: 256K x 72, 512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM
中文描述: 512K X 36 CACHE SRAM, 2.6 ns, PQFP100
封裝: TQFP-100
文件頁數(shù): 13/34頁
文件大小: 229K
代理商: IS61LPS51236A-250TQI
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. D
02/11/05
13
IS61VPS25672A, IS61LPS25672A
IS61VPS51236A, IS61LPS51236A, IS61VPS102418A, IS61LPS102418A
ISSI
INTERLEAVED BURST ADDRESS TABLE (MODE = V
DD
or No Connect)
External Address
A1 A0
1st Burst Address
A1 A0
2nd Burst Address
A1 A0
3rd Burst Address
A1 A0
00
01
10
11
01
00
11
10
10
11
00
01
11
10
01
00
LINEAR BURST ADDRESS TABLE (MODE = VSS)
0,0
1,0
0,1
A1', A0' = 1,1
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
T
STG
P
D
I
OUT
V
IN
, V
OUT
Voltage Relative to Vss for I/O Pins
V
IN
Voltage Relative to Vss for
for Address and Control Inputs
V
DD
Voltage on V
DD
Supply Relative to Vss
Parameter
Storage Temperature
Power Dissipation
Output Current (per I/O)
Value
–55 to +150
1.6
100
–0.5 to V
DDQ
+ 0.5
–0.5 to V
DD
+ 0.5
Unit
°C
W
mA
V
V
–0.5 to 4.6
V
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause perma-
nent damage to the device. This is a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
2. This device contains circuity to protect the inputs against damage due to high static voltages or
electric fields; however, precautions may be taken to avoid application of any voltage higher than
maximum rated voltages to this high-impedance circuit.
3. This device contains circuitry that will ensure the output devices are in High-Z at power up.
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