參數(shù)資料
型號(hào): IS66WVD409616ALL-7010BLI
元件分類: SRAM
英文描述: 4M X 16 PSEUDO STATIC RAM, 70 ns, PBGA54
封裝: 8 X 6 MM, MO-207, VFBGA-54
文件頁(yè)數(shù): 28/52頁(yè)
文件大?。?/td> 1128K
代理商: IS66WVD409616ALL-7010BLI
IS66WVD409616ALL
Advanced Information
34
Rev.00A | January 2010
www.issi.com - SRAM@issi.com
Timing Diagrams
Figure 17: Power-Up Initialization Timing
VDD, VDDQ=1.7V
Device Initialization
tPU > 150us
Device ready for
normal operation
VDD(MIN)
CE#
t
DPD
t
DPDX
t
PU
Write
RCR[4]=0
DPD Enabled
DPD Exit
Device Initialization Device ready for
normal operation
Figure 18: DPD Entry and Exit Timing Parameters
Figure 19: Asynchronous READ
Address
ADQ0-
ADQ15
ADV#
CE#
UB#/LB#
WAIT
OE#
WE#
HiZ
t
VP
t
AVS
t
AVH
VALID
ADDRESS
VALID
ADDRESS
VALID
OUTPUT
t
CO
t
AADV
t
OE
t
HZ
t
CVP
t
OLZ
t
BA
t
AA
t
BHZ
t
OHZ
t
OEW
t
WZ
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