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參數(shù)資料
| 型號： | IS82C600 |
| 廠商： | Integrated Silicon Solution, Inc. |
| 英文描述： | 64K x 16 High-Speed SRAM with Address Decoding and Ready Logic(帶地址譯碼器和預備邏輯的高速靜態(tài)RAM) |
| 中文描述： | 64K的× 16高速的地址譯碼和就緒邏輯（帶地址譯碼器和預備邏輯的高速靜態(tài)RAM的靜態(tài)存儲器） |
| 文件頁數(shù)： | 15/21頁 |
| 文件大小： | 129K |
| 代理商： | IS82C600 |
IS82C600
Integrated Silicon Solution, Inc. — 1-800-379-4774
PRELIMINARY
TB001-0B
01/20/99
15
ISSI
Register 5
CSMEMs4
Pin Select Register (default 0112):
This register is used to select the decoding for
CSMEM
s4.
The decoding is on an 8K boundary and can be
programmed to respond to
DS
or
IS
address space or a
combination thereof. The
CSMEM
s4 can be used as a chip
select pin for external memory or I/O device. The bit
descriptions and programmability are identical to Register
1, except that the default is 0112. Refer to
CSMEM
s0 bit
descriptions.
15
14
13
12
11
10
09
08
07
06
05
04
03
02
01
00
RSVD
RSVD RSVD RSVD RSVD RSVD RSVD A15
A14
A13
RSVD
DS
IS
RSVD SZ1
SZ0
DS
0
0
IS
0
1
Space for which
CSMEMs0
will not respond to any space, i.e., disabled.
CSMEMs0
will go active for I/O space (when
IS
is active) as determined by the starting
address and size bits.
CSMEMs0
will go active for DATA space (when
DS
is active) as determined by the starting
address and size bits.
CSMEMs0
will go active for I/O or DATA space (when
IS
or
DS
is active) as determined by
the starting address and size bits.
CSMEMs4
will be active
1
0
1
1
Size for which
address. The sizes are in the increments of 8K Words.
CSMEMs0
will be active for starting address to starting address + 8K
CSMEMs0
will be active for starting address to starting address + 16K
CSMEMs0
will be active for starting address to starting address + 32K
CSMEMs0
will be active for starting address to starting address + 64K
CSMEMs4
will be active starting from the programmed starting
SZ1
0
0
1
1
SZ0
0
1
0
1
CSMEMs5
Pin Select Register
This is a negative decode of the other chip selects, i.e., it
is active when
CSMEM
s[4:0] are HIGH.
\
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