25 FN7576.3 June 7, 2012 ALPHA Hot Register (ALPHAH) The ALPHA Hot variable is 7 bits and is defined as the temperature coeffici" />
參數(shù)資料
型號: ISL12022MIBZ-TR5421
廠商: Intersil
文件頁數(shù): 18/31頁
文件大小: 0K
描述: IC RTC/CALENDAR TEMP SNSR 20SOIC
應用說明: Addressing Power Issues in Real Time Clock Appls
產(chǎn)品培訓模塊: Solutions for Industrial Control Applications
標準包裝: 1,000
類型: 時鐘/日歷
特點: 警報器,夏令時,閏年,SRAM
存儲容量: 128B
時間格式: HH:MM:SS(12/24 小時)
數(shù)據(jù)格式: YY-MM-DD-dd
接口: I²C,2 線串口
電源電壓: 2.7 V ~ 5.5 V
電壓 - 電源,電池: 1.8 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
供應商設備封裝: 20-SOIC
包裝: 帶卷 (TR)
ISL12022MR5421
25
FN7576.3
June 7, 2012
ALPHA Hot Register (ALPHAH)
The ALPHA Hot variable is 7 bits and is defined as the temperature
coefficient of Crystal from the XT0 value to +85°C (both Alpha Hot
and Alpha Cold must be programmed to provide full temperature
compensation). It is normally given in units of ppm/°C2, with a
typical value of -0.034. Like the ALPHA Cold version, a scaled
version of the absolute value of this coefficient is used in order to
get an integer value. Therefore, ALP_H <7:0> is defined as the
(|Actual Alpha Hot Value| x 2048) and converted to binary. For
example, a crystal with Alpha Hot of -0.034ppm/°C2 is first scaled
(|2048*(-0.034)| = 70d) and then converted to a binary number
of 01000110b.
The practical range of Actual ALPHAH values is from -0.020 to -
0.060.
The ISL12022MR5421 has a preset ALPHAH value
corresponding to the crystal in the module. This value is recalled
on initial power-up and is preset in device production. It is READ
ONLY and cannot be overwritten by the user.
User Registers (Accessed by
Using Slave Address 1010111x)
Addresses [00h to 7Fh]
These registers are 128 bytes of battery-backed user SRAM. The
separate I2C slave address must be used to read and write to
these registers.
I2C Serial Interface
The ISL12022MR5421 supports a bi-directional bus oriented
protocol. The protocol defines any device that sends data onto
the bus as a transmitter and the receiving device as the receiver.
The device controlling the transfer is the master and the device
being controlled is the slave. The master always initiates data
transfers and provides the clock for both transmit and receive
operations. Therefore, the ISL12022MR5421 operates as a slave
device in all applications.
All communication over the I2C interface is conducted by sending
the MSB of each byte of data first.
Protocol Conventions
Data states on the SDA line can change only during SCL LOW
periods. SDA state changes during SCL HIGH are reserved for
indicating START and STOP conditions (see Figure 17). On power-
up of the ISL12022MR5421, the SDA pin is in the input mode.
All I2C interface operations must begin with a START condition,
which is a HIGH to LOW transition of SDA while SCL is HIGH. The
ISL12022MR5421 continuously monitors the SDA and SCL lines
for the START condition and does not respond to any command
until this condition is met (see Figure 17). A START condition is
ignored during the power-up sequence.
All I2C interface operations must be terminated by a STOP
condition, which is a LOW to HIGH transition of SDA while SCL is
HIGH (see Figure 17). A STOP condition at the end of a read
operation or at the end of a write operation to memory only
places the device in its standby mode.
10000
25.0
10001
24.5
10010
24.0
10011
23.5
10100
23.0
10101
22.5
10110
22.0
10111
21.5
11000
21.0
11001
20.5
11010
20.0
11011
19.5
11100
19.0
11101
18.5
11110
18.0
11111
17.5
TABLE 28. ALPHAH REGISTER
ADD
R
7
6543210
2Dh
D
ALP_H
6
ALP_H
5
ALP_H
4
ALP_H
3
ALP_H
2
ALP_H
1
ALP_H
0
TABLE 27. XT0 VALUES (Continued)
XT<4:0>
TURNOVER TEMPERATURE
FIGURE 17. VALID DATA CHANGES, START AND STOP CONDITIONS
SDA
SCL
START
DATA
STOP
STABLE
CHANGE
DATA
STABLE
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