參數(shù)資料
| 型號： | ISL12023IVZ-T |
| 廠商： | Intersil |
| 文件頁數(shù)： | 25/29頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC RTC/CLDR TEMP SNSR 14-TSSOP |
| 產品培訓模塊： | Solutions for Industrial Control Applications |
| 標準包裝： | 2,500 |
| 類型： | 時鐘/日歷 |
| 特點： | 警報器，夏令時，閏年，SRAM |
| 存儲容量： | 128B |
| 時間格式： | HH:MM:SS（12/24 小時） |
| 數(shù)據(jù)格式： | YY-MM-DD-dd |
| 接口： | I²C，2 線串口 |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 電壓 - 電源，電池： | 1.8 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 14-TSSOP |
| 包裝： | 帶卷 (TR) |
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ISL12023
5
FN6682.3
December 6, 2011
SDA vs SCL Timing
tDH
Output Data Hold Time
From SCL falling edge crossing
30% of VDD, until SDA enters
the 30% to 70% of VDD window.
0ns
tR
SDA and SCL Rise Time
From 30% to 70% of VDD.
20 + 0.1 x Cb
300
ns
tF
SDA and SCL Fall Time
From 70% to 30% of VDD.
20 + 0.1 x Cb
300
ns
Cb
Capacitive Loading of SDA or SCL
Total on-chip and off-chip
10
400
pF
RPU
SDA and SCL Bus Pull-up Resistor Off-
chip
Maximum is determined by tR
and tF.
For Cb = 400pF, max is about
2k
Ω~2.5kΩ.
For Cb = 40pF, max is about
15k
Ω~20kΩ
1k
Ω
NOTES:
4. Temperature Conversion is inactive below VBAT = 2.7V. Device operation is not guaranteed at VBAT<1.8V.
5. IRQ/FOUT Inactive.
6. VDD > VBAT +VBATHYS
7. Specified at +25°C.
8. In order to ensure proper timekeeping, the VDD SR- specification must be followed.
9. Limits should be considered typical and are not production tested.
10. These are I2C specific parameters and are not tested, however, they are used to set conditions for testing devices to validate specification.
11. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
12. Specifications are typical and require using a recommended crystal (see “Application Section” on page 24).
13. Minimum VDD and/or VBAT of 1V to sustain the SRAM. The value is based on characterization and it is not tested.
14. To avoid EEPROM recall issues, it is advised to use this minimum power up slew rate. Not tested, shown as typical only.
I2C Interface Specifications Test Conditions: VDD = +2.7 to +5.5V, TA = -40°C to +85°C, unless otherwise specified. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 11)
TYP
(Note 7)
MAX
(Note 11)
UNITS
NOTES
tSU:STO
tDH
tHIGH
tSU:STA
tHD:STA
tHD:DAT
tSU:DAT
SCL
SDA
(INPUT TIMING)
SDA
(OUTPUT TIMING)
tF
tLOW
tBUF
tAA
tR
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