參數(shù)資料
型號: ISL6232
廠商: Intersil Corporation
英文描述: Octal D-Type Transparent Latches With 3-State Outputs 20-SOIC -40 to 85
中文描述: 高效率系統(tǒng)電源控制器,用于筆記本電腦
文件頁數(shù): 22/25頁
文件大?。?/td> 746K
代理商: ISL6232
22
FN9116.0
April 18, 2005
inductor, or DCR of the output inductor, is used for peak
current control signal and overcurrent protection. The
inductor is not considered as a state variable since its peak
current is constant, and the system becomes single order
system. It is much easier to design a type II compensator to
stabilize the loop than to implement voltage mode control.
Peak current mode control has inherent input voltage feed-
forward function to achieve good line regulation. Figure 32
shows the small signal model of the synchronous buck
regulator.
PWM COMPARATOR GAIN F
M
:
The PWM comparator gain Fm for peak current mode
control is given by:
Where S
e
is the slew rate of the slope compensation and S
n
is given by
where R
T
is trans-resistance, and is the product of the
current sensing resistance and gain of the current amplifier
in current loop.
CURRENT SAMPLING TRANSFER FUNCTION H
e
(S):
In current loop, the current signal is sampled every switching
cycle. It has the following transfer function:
where Q
n
and
ω
n
are given by
Power Stage Transfer Functions
Transfer function F
1
(S) from control to output voltage is:
2
o
p
Where
Transfer function F
2
(S) from control to inductor current is
given by:
where
.
Current loop gain T
i
(S) is expressed as the following
equation:
The voltage loop gain with open current loop is:
The Voltage loop gain with current loop closed is given by:
Where
error amplifier. If T
i
(S)>>1, then the above equation can be
simplified as follows:
p
is the feedback voltage of the voltage
From the above equation, it is shown that the system is a
single order system, which has a single pole located at
before the half switching frequency. Therefore, a simple type
II compensator can be easily used to stabilize the system.
d
V
in
d
L
I
in
in
i
L
+
1:D
+
^
L
i
Co
Rc
Ro
-Av(S)
d
comp
v
^
R
T
Fm
He(S)
+
T
i
(S)
K
v
o
T
v
(S)
^
^
V^
^
^
^
FIGURE 32. SMALL SIGNAL MODEL OF SYNCHRONOUS
BUCK REGULATOR
F
m
v
comp
n
e
)
T
s
-----------+
=
=
(EQ. 20)
S
n
R
t
V
---------------------
V
o
=
(EQ. 21)
H
e
S
( )
2
------
ω
n
2
=
n
n
--------------
1
+
+
(EQ. 22)
Q
n
2
π
--
=
ω
n
π
f
s
=
=
,
F
1
S
( )
v
o
d
--
V
in
1
-----------
+
ω
o
------
--------------
1
+
+
--------------------------------------
=
=
(EQ. 23)
ω
esr
c
o
--------------
Q
p
R
o
C
o
L
------
ω
o
LC
o
--------------
=
,
,
=
F
2
S
( )
I
o
d
-
V
+
R
o
R
L
--------------------
1
------
+
------
ω
o
2
o
Q
p
--------------
1
+
+
--------------------------------------
=
=
(EQ. 24)
ω
z
o
o
--------------
=
T
i
S
( )
R
T
F
m
F
2
S
( )
H
e
S
( )
=
T
v
S
( )
KF
m
F
1
S
( )
A
v
S
( )
=
(EQ. 25)
L
v
S
( )
T
S
i
S
( )
( )
-----+
=
(EQ. 26)
K
V
o
----------
V
FB
,
=
L
v
S
( )
V
o
----------
R
R
L
+
T
--------------------
1
---------------------
A
S
-----------
+
1
------
+
( )
e
S
----------------
ω
p
o
o
--------------
,
=
(EQ. 27)
p
ω
ISL6232
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