參數(shù)資料
型號(hào): ISL6232
廠商: Intersil Corporation
英文描述: Octal D-Type Transparent Latches With 3-State Outputs 20-SOIC -40 to 85
中文描述: 高效率系統(tǒng)電源控制器,用于筆記本電腦
文件頁(yè)數(shù): 24/25頁(yè)
文件大?。?/td> 746K
代理商: ISL6232
24
FN9116.0
April 18, 2005
conditions. An additional post-regulation circuit can be used
to improve load regulation if necessary.
The power requirements of the auxiliary supply must be
considered in the design of the main output. The flyback
transformer must be designed to deliver the required current
in both the primary and the secondary outputs with the
proper turns ratio and inductance. The overcurrent limit
threshold may also be adjusted accordingly. Power from the
main and secondary outputs is combined to get an
equivalent current referred to the main output, which is given
by the following equation.
where P
main
and P
auxiliary
are the main power and auxiliary
power, respectively.
For the circuit in Figure 35, the turns ratio N of the flyback is
determined by
where V
SEC
is the minimum required rectified secondary
voltage, V
F
is the forward voltage drop across the secondary
rectifier, and V
RECT
is the on-state voltage drop across the
synchronous rectifier MOSFET. The secondary rectifier in
the flyback must withstand flyback voltages, which is given
by the following formula
The secondary rectifier's reverse breakdown voltage rating
must also accommodate any ringings due to leakage
inductance. This voltage ringings can be minimized by
adding a snubber circuit across the secondary rectifier. Its
current rating should be at least twice the DC load current on
the auxiliary output. The optional linear post regulator must
be selected to deliver the required load current, and it should
be configured to run close to dropout to minimize power
dissipation.
PCB Layout Guidelines
Careful PC board layout is critical to achieve minimal
switching losses and clean, stable operation. This is
especially true when multiple converters are on the same PC
circuit board, where one circuit can affect the other due to
the noise coupling through the power ground. The switching
power stages require particular attention. Mount all of the
power components on the top-side of the board with their
ground terminals flush against one another, if possible.
Use the following guidelines for good PC board layout:
Isolate the power components from the sensitive analog
components.
Use a separate power plane ground and
signal power ground if possible.
Use a star ground connection on the power plane to
minimize the cross-talk between OUT3 and OUT5.
Keep the high-current paths short, especially at the
ground terminals. This practice is essential for stable,
jitter-free operation.
Keep the power traces and load connections short. This
practice is essential for high efficiency. Using thick copper
PC boards (2oz vs. 1oz) can enhance full-load efficiency
by 1% or more. Correctly routing PC board traces must be
approached in terms of fractions of centimeters, where a
single milliohm of excess trace resistance causes a
measurable efficiency loss.
When trade-offs in trace lengths must be made, it is
preferable to allow the inductor-charging path to be made
longer than the discharge path. For example, it is better to
allow some extra distance between the input capacitors
and the high-side MOSFET than to allow distance
between the inductor and the synchronous rectifier or
between the inductor and the output filter capacitor,
because the synchronous rectifier conduction time is
usually longer than that of high-side MOSFET.
Ensure that the OUT connection to the output capacitors is
short and direct. This reduces the voltage spike or dip due
to the trace resistance between OUT and output
capacitors.
Route high-speed switching nodes (BOOT, UGATE,
PHASE, and LGATE) away from sensitive analog areas
(REF, COMP, FB, and CS). Use PGND3 and PGND5 as
an EMI shield to keep radiated switching noise away from
the ICs feedback divider and analog bypass capacitors.
Keep the FB traces as short as possible for good radiated
immunity design.
I
total
P
-------------------------------------------------
P
OUT
+
=
(EQ. 31)
N
V
OUT
V
V
OUT
+
V
RECT
---------------------+
=
(EQ. 32)
V
REV
V
SEC
=
N
V
IN
V
OUT
(
)
+
(EQ. 33)
BOOT5
UGATE5
PHASE5
LGATE5
OUT5
Q1
Q2
H
N = 2.2
ISL6232
1:
N
D1
D2
4.7μF
R
12V/20mA
LDO
Optional
12V
T: L1
-
6.8
1
T: Delta Electronics
STQ125-6822
FIGURE 35. FLYBACK SECONDARY OUTPUT
ISL6232
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