參數(shù)資料
型號(hào)： ISL6308
廠商： Intersil Corporation
英文描述： Quadruple 2-Input Exclusive-OR Gates 14-SOIC -40 to 85
中文描述： 三相降壓PWM控制器，帶有高電流集成MOSFET驅(qū)動(dòng)器
文件頁數(shù)： 12/27頁
文件大?。?/td> 765K
代理商： ISL6308
12
FN9208.2
October 19, 2005
to VSEN pin to set the output voltage level as shown in
Figure 6. This method is good for generating voltages up to
2.3V (with the REF voltage set to 1.5V).
For this case, the output voltage can be obtained as follows:
It is recommended to choose resistor values of less than
500
for R
S1
and R
P1
resistors in order to get better output
voltage DC accuracy.
Voltage Regulation
In order to regulate the output voltage to a specified level, the
ISL6308 uses the integrating compensation network shown in
Figure 6. This compensation network insures that the steady
state error in the output voltage is limited only to the error in
the reference voltage (output of the DAC or the external
voltage reference) and offset errors in the OFS current
source, remote sense and error amplifiers. Intersil specifies
the guaranteed tolerance of the ISL6308 to include the
combined tolerances of each of these elements, except when
an external reference or voltage divider is used, then the
tolerances of these components has to be taken into account.
The ISL6308 incorporates an internal differential remote-
sense amplifier in the feedback path. The amplifier removes
the voltage error encountered when measuring the output
voltage relative to the controller ground reference point,
resulting in a more accurate means of sensing output
voltage. Connect the microprocessor sense pins to the non-
inverting input, VSEN, and inverting input, RGND, of the
remote-sense amplifier. The droop voltage, VDROOP, also
feeds into the remote-sense amplifier. The remote-sense
output, VDIFF, is therefore equal to the sum of the output
voltage, VOUT, and the droop voltage. VDIFF is connected
to the inverting input of the error amplifier through an
external resistor.
The output of the error amplifier, V
COMP
, is compared to the
sawtooth waveform to generate the PWM signals. The PWM
signals control the timing of the Internal MOSFET drivers
and regulate the converter output so that the voltage at FB is
equal to the voltage at REF. This will regulate the output
voltage to be equal to Equation 5. The internal and external
circuitry that controls voltage regulation is illustrated in
Figure 6.
Load-Line (Droop) Regulation
In some high current applications, a requirement on a
precisely controlled output impedance is imposed. This
dependence of output voltage on load current is often
termed “droop” or “l(fā)oad line” regulation.
The Droop is an optional feature in the ISL6308. It can be
enabled by connecting ICOMP pin to DROOP pin as shown
in Figure 6. To disable it, connect the DROOP pin to IREF
pin.
As shown in Figure 6, a voltage, V
DROOP
, proportional to the
total current in all active channels, I
OUT
, feeds into the
differential remote-sense amplifier. The resulting voltage at
the output of the remote-sense amplifier is the sum of the
output voltage and the droop voltage. As Equation 4 shows,
feeding this voltage into the compensation network causes
the regulator to adjust the output voltage so that it’s equal to
the reference voltage minus the droop voltage.
The droop voltage, V
DROOP
, is created by sensing the
current through the output inductors. This is accomplished
by using a continuous DCR current sensing method.
Inductor windings have a characteristic distributed
resistance or DCR (Direct Current Resistance). For
simplicity, the inductor DCR is considered as a separate
TABLE 1. ISL6308 DAC VOLTAGE SELECTION TABLE
REF1
REF0
VDAC
0
0
0.600V
0
1
0.900V
1
0
1.200V
1
1
1.500V
OUT
V
REF
R
---------------------------------
R
+
(
)
R
P1
V
OFS
V
DROOP
–
+
=
(EQ. 4)
V
OUT
V
REF
V
OFST
±
V
DROOP
–
=
(EQ. 5)
FIGURE 6. OUTPUT VOLTAGE AND LOAD-LINE
REGULATION WITH OFFSET ADJUSTMENT
I
OFS
EXTERNAL CIRCUIT
R
2
C
1
ISL6308 INTERNAL CIRCUIT
COMP
R
1
FB
VDIFF
VSEN
RGND
-
+
V
OFS
ERROR AMPLIFIER
-
+
+
DIFFERENTIAL
REMOTE-SENSE
AMPLIFIER
V
COMP
REF
C
REF
-
+
VID DAC
IREF
DROOP
-
+
V
DROOP
-
+
V
OUT
-
DAC
ICOMP
+
-
ISUM
ISENSE
AMP
R
P1
R
S1
C
SUM
ISL6308
相關(guān)PDF資料
PDF描述
ISL6308CRZ Three-Phase Buck PWM Controller with High Current Integrated MOSFET Drivers
ISL6308CRZ-T Quadruple 2-Input Exclusive-OR Gates 14-SOIC -40 to 85
ISL6308IRZ-T Three-Phase Buck PWM Controller with High Current Integrated MOSFET Drivers
ISL6315 Two-Phase Multiphase Buck PWM Controller with Integrated MOSFET Drivers(帶集成MOSFET驅(qū)動(dòng)器的雙相降壓PWM控制器)
ISL6316 Quadruple 2-Input Exclusive-OR Gates 14-SOIC -40 to 85
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISL6308ACRZ 功能描述:IC CTRLR PWM BUCK 3PHASE 40-QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 專用型 系列:- 標(biāo)準(zhǔn)包裝:43 系列:- 應(yīng)用:控制器，Intel VR11 輸入電壓:5 V ~ 12 V 輸出數(shù):1 輸出電壓:0.5 V ~ 1.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-QFN（7x7） 包裝:管件
ISL6308ACRZR5609 制造商:Intersil Corporation 功能描述:PB-FREE DAC-LESS MULTI-PHASE PWM CONTR W/3-DRIVERS, HARD WI - Rail/Tube
ISL6308ACRZ-T 功能描述:IC CTRLR PWM BUCK 3PHASE 40-QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 專用型 系列:- 標(biāo)準(zhǔn)包裝:43 系列:- 應(yīng)用:控制器，Intel VR11 輸入電壓:5 V ~ 12 V 輸出數(shù):1 輸出電壓:0.5 V ~ 1.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-QFN（7x7） 包裝:管件
ISL6308ACRZ-TR5609 制造商:Intersil Corporation 功能描述:PB-FREE DAC-LESS MULTI-PHASE PWM CONTR W/3-DRIVERS, HARD WIR - Tape and Reel
ISL6308AEVAL1Z 功能描述:EVALUATION BOARD FOR ISL6308A RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估板 - DC/DC 與 AC/DC（離線）SMPS 系列:- 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:True Shutdown™ 主要目的:DC/DC，步升 輸出及類型:1，非隔離 功率 - 輸出:- 輸出電壓:- 電流 - 輸出:1A 輸入電壓:2.5 V ~ 5.5 V 穩(wěn)壓器拓?fù)浣Y(jié)構(gòu):升壓 頻率 - 開關(guān):3MHz 板類型:完全填充 已供物品:板 已用 IC / 零件:MAX8969
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