參數(shù)資料
型號(hào)： ISL6308
廠(chǎng)商： Intersil Corporation
英文描述： Quadruple 2-Input Exclusive-OR Gates 14-SOIC -40 to 85
中文描述： 三相降壓PWM控制器，帶有高電流集成MOSFET驅(qū)動(dòng)器
文件頁(yè)數(shù)： 16/27頁(yè)
文件大?。?/td> 765K
代理商： ISL6308
16
FN9208.2
October 19, 2005
Fault Monitoring and Protection
The ISL6308 actively monitors output voltage and current to
detect fault conditions. Fault monitors trigger protective
measures to prevent damage to the load.
One common power good indicator is provided for linking to
external system monitors. The schematic in Figure 13
outlines the interaction between the fault monitors and the
power good signal
Power Good Signal
The power good pin (PGOOD) is an open-drain logic output
that transitions high when the converter is operating after
soft-start. PGOOD pulls low during shutdown and releases
high after a successful soft-start. PGOOD transitions low
when an undervoltage, overvoltage, or overcurrent condition
is detected or when the controller is disabled by a reset from
ENLL or POR. If after an undervoltage or overvoltage event
occurs the output returns to within under and overvoltage
limits, PGOOD will return high.
Undervoltage Detection
The undervoltage threshold is set at 82% of the REF
voltage. When the output voltage (VSEN-RGND) is below
the undervoltage threshold, PGOOD gets pulled low. No
other action is taken by the controller. PGOOD will return
high if the output voltage rises above 85% of the REF
voltage.
Overvoltage Protection
The ISL6308 constantly monitors the difference between the
VSEN and RGND voltages to detect if an overvoltage event
occurs. During soft-start, while the DAC/REF is ramping up,
the overvoltage trip level is the higher of REF plus 150mV or
a fixed voltage, V
OVP
. The fixed voltage, V
OVP
, is 1.67V.
Upon successful soft-start, the overvoltage trip level is only
REF plus 150mV. OVP releases 50mV below its trip point if it
was “REF plus 150mV” that tripped it, and releases 100mV
below its trip point if it was the fixed voltage, V
OVP
, that
tripped it. Actions are taken by the ISL6308 to protect the
load when an overvoltage condition occurs, until the output
voltage falls back within set limits.
At the inception of an overvoltage event, all LGATE signals
are commanded high, and the PGOOD signal is driven low.
This causes the controller to turn on the lower MOSFETs
and pull the output voltage below a level that might cause
damage to the load. The LGATE outputs remain high until
VDIFF falls to within the overvoltage limits explained above.
The ISL6308 will continue to protect the load in this fashion
as long as the overvoltage condition recurs.
Once an overvoltage condition ends the ISL6308 continues
normal operation and PGOOD returns high.
Pre-POR Overvoltage Protection
Prior to PVCC and VCC exceeding their POR levels, the
ISL6308 is designed to protect the load from any overvoltage
events that may occur. This is accomplished by means of an
internal 10k
resistor tied from PHASE to LGATE, which
turns on the lower MOSFET to control the output voltage
until the overvoltage event ceases or the input power supply
cuts off. For complete protection, the low side MOSFET
FIGURE 12. SOFT-START WAVEFORMS FOR ISL6308-BASED
MULTI-PHASE CONVERTER
ENLL (5V/DIV)
V
OUT
(0.5V/DIV)
GND>
T1
GND>
T2
T3
OUTPUT PRECHARGED
BELOW DAC LEVEL
OUTPUT PRECHARGED
ABOVE DAC LEVEL
FIGURE 13. POWER GOOD AND PROTECTION CIRCUITRY
-
+
DAC + 150mV
VSEN
-
+
0.82 x DAC
OV
UV
PGOOD
SOFT-START, FAULT
AND CONTROL LOGIC
-
+
OC
-
+
ISEN
IREF
ISUM
ICOMP
OCSET
R
OCSET
+
-
V
DROOP
V
OCSET
+
-
V
OVP
100μA
ISL6308 INTERNAL CIRCUITRY
-
+
RGND
x1
-
+
+1V
VDIFF
DROOP*
* Connect DROOP to IREF
to disable the Droop feature.
ISL6308
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