27 FN7853.1 June 17, 2011 Digital Temperature Sensor ADDRESS 0X4B: TEMP_COUNTER_HIGH Bits [2:0] of this register hold the 3 MSBs of th" />
參數(shù)資料
型號: ISLA222P20IRZ
廠商: Intersil
文件頁數(shù): 20/33頁
文件大?。?/td> 0K
描述: IC ADC 12BIT SRL/SPI 72QFN
標(biāo)準(zhǔn)包裝: 1
系列: FemtoCharge™
位數(shù): 12
采樣率(每秒): 200M
數(shù)據(jù)接口: 串行,SPI?
轉(zhuǎn)換器數(shù)目: 2
功率耗散(最大): 830mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 72-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 72-QFN(10x10)
包裝: 托盤
輸入數(shù)目和類型: *
ISLA222P
27
FN7853.1
June 17, 2011
Digital Temperature Sensor
ADDRESS 0X4B: TEMP_COUNTER_HIGH
Bits [2:0] of this register hold the 3 MSBs of the 11-bit
temperature code.
Bit [7] of this register indicates a valid temperature_counter read
was performed. A logic ‘1’ indicates a valid read.
ADDRESS 0X4C: TEMP_COUNTER_LOW
Bits [7:0] of this register hold the lower 8 LSBs of the 11-bit
temperature code.
ADDRESS 0X4D: TEMP_COUNTER_CONTROL
Bit [7] Measurement mode select bit, set to ‘1’ for recommended
PTAT mode. ‘0’ (default) is IPTAT mode and is less accurate and
not recommended.
Bit [6] Temperature counter enable bit. Set to ‘1’ to enable.
Bit [5] Temperature counter power-down bit. Set to ‘1’ to
power-down temperature counter.
Bit [4] Temperature counter reset bit. Set to ‘1’ to reset count.
Bit [3:1] Three bit frequency divider field. Sets temperature
counter update rate. Update rate is proportional to ADC sample
clock rate and divide ratio. A ‘101’ updates the temp counter
every ~ 66s (for 250MSPS). Faster update rates result in lower
precision.
Bit [0] Select sampler bit. Set to ‘0’.
This set of registers provides digital access to a PTAT or
IPTAT-based temperature sensor, allowing the system to
estimate the temperature of the die, allowing easy access to
information that can be used to decide when to recalibrate the
A/D as needed.
The nominal transfer function of the temperature counter is
Codes (in decimal) = 0.56*T(°C) + 618. This corresponds to
approximately a 65 LSB increase from -40° to +85°C.
A typical temperature measurement can occur as follows:
1. Write ‘0xCA’ to address 0x4D - enable temp counter,
divide=’101’
2. Wait ≥ 132s (at 250Msps) - longer wait time ensures the
sensor completes one valid cycle.
3. Write ‘0x20’ to address 0x4D - power down, disable temp
counter-recommended between measurements. This
ensures that the output does not change between MSB and
LSB reads.
4. Read address 0x4B (MSBs)
5. Read address 0x4C (LSBs)
6. Record temp code value
7. Write ‘0x20’ to address 0x4D - power-down, disable temp
counter. Contact sales support for more information:
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