參數(shù)資料
型號: ISP1161BM
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Full-speed Universal Serial Bus single-chip host and device controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-414-1, LQFP-64
文件頁數(shù): 12/127頁
文件大?。?/td> 2762K
代理商: ISP1161BM
Philips Semiconductors
ISP1161
Full-speed USB single-chip host and device controller
Product data
Rev. 01 — 3 July 2001
12 of 130
9397 750 08313
Philips Electronics N.V. 2001. All rights reserved.
7.6 GoodLink (in DC)
Indication of a good USB connection is provided at pin GL through GoodLink
technology. During enumeration the LED indicator will blink on momentarily. When
the ISP1161 has been successfully enumerated (the device address is set), the LED
indicator will remain permanently on. Upon each successful packet transfer (with
ACK) to and from the ISP1161 the LED will blink off for 100 ms. During ‘suspend’
state the LED will remain off.
This feature provides a user-friendly indicator of the status of the USB device, the
connected hub and the USB traffic. It is a useful field diagnostics tool for isolating
faulty equipment. It can therefore help to reduce field support and hotline overhead.
7.7 Suspend and wakeup (in DC)
ISP1161’s DC also can be put into suspended state by toggling bit 5, GOSUSP, of the
Mode Register. Pin D_SUSPEND is used for the DC’s suspended state sensing
output. The polarity of D_SUSPEND pin can be changed by setting bit 2, PWROFF,
of the Hardware Configuration Register.
There are some ways to resume ISP1161’s DC from the suspended state:
By USB host, drivers a K-state on the USB bus (global resume)
By pin D_WAKEUP or CS.
Figure 8
shows the timing relationship for DC going into suspended state, and
resuming from the suspended state.
8.
Microprocessor bus interface
8.1 I/O addressing mode
ISP1161 provides I/O addressing mode for external microprocessors to access its
internal control registers and FIFO buffer RAM. I/O addressing mode has the
advantage of reducing the pin count for address lines and so occupying less
microprocessor resources. ISP1161 uses only two address lines: A1 and A0 to
access the internal control registers and FIFO buffer RAM. Therefore, ISP1161
occupies only four I/O ports or four memory locations of a microprocessor. External
Fig 8.
ISP1161 DC’s suspend and wakeup.
MGS782
WAKEUP
GOSUSP
2 ms
0.5 ms
SUSPEND
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ISP1181 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus interface device
ISP1181A 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus peripheral controller
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ISP1181ABS,551 功能描述:USB 接口集成電路 USB 1.1 ADVANCED DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20