參數(shù)資料
型號： ISP1161BM
廠商： NXP SEMICONDUCTORS
元件分類： 總線控制器
英文描述： Full-speed Universal Serial Bus single-chip host and device controller
中文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝： 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-414-1, LQFP-64
文件頁數(shù)： 57/127頁
文件大小： 2762K
代理商： ISP1161BM
Philips Semiconductors
ISP1161
Full-speed USB single-chip host and device controller
Product data
Rev. 01 — 3 July 2001
57 of 130
9397 750 08313
Philips Electronics N.V. 2001. All rights reserved.
The SchedulingOverrunCount field indicates the number of frames with which the HC
has detected the scheduling overrun error. This occurs when the Periodic list does
not complete before EOF. When a scheduling overrun error is detected, the HC
increments the counter and sets the SchedulingOverrun field in the HcInterruptStatus
register.
Code (Hex): 02 —
read
Code (Hex): 82 —
write
Table 20: HcCommandStatus Register: bit allocation
Bit
31
Symbol
Reset
Access
Bit
23
Symbol
Reset
0
Access
Bit
15
Symbol
Reset
Access
Bit
7
Symbol
Reset
0
Access
30
29
28
27
26
25
24
reserved
00H
R
22
21
20
19
18
17
16
reserved
SOC[1:0]
0
0
0
0
0
0
0
R
R
14
13
12
11
10
9
8
reserved
00H
R/W
6
5
4
3
2
1
0
reserved
0
HCR
0
0
0
0
0
0
R/W
Table 21: HcCommandStatus Register: bit description
Bit
Symbol
Description
31 to 18
-
reserved
17 to 16
SOC[1:0]
SchedulingOverrunCount:
The field is incremented on each
scheduling overrun error. It is initialized to 00B and wraps around
at 11B. It will be incremented when a scheduling overrun is
detected even if SchedulingOverrun in HcInterruptStatus has
already been set. This is used by HCD to monitor any persistent
scheduling problems.
15 to 1
-
reserved
0
HCR
HostControllerReset:
This bit is set by HCD to initiate a software
reset of HC. Regardless of the functional state of HC, it moves to
the USBSUSPEND state in which most of the operational registers
are reset except those stated otherwise; e.g., the InterruptRouting
field of HcControl, and no Host bus accesses are allowed. This bit
is cleared by HC upon the completion of the reset operation. The
reset operation must be completed within 10 s. This bit, when set,
should not cause a reset to the Root Hub and no subsequent reset
signaling should be asserted to its downstream ports.
相關PDF資料
PDF描述
ISP1181ABS INDUCTOR 1.0NH +-.3NH FIXED SMD
ISP1181A Full-speed Universal Serial Bus peripheral controller
ISP1181ADGG Full-speed Universal Serial Bus peripheral controller
ISP1181B Full-speed Universal Serial Bus peripheral controller
ISP1181BBS Full-speed Universal Serial Bus peripheral controller
相關代理商/技術參數(shù)
參數(shù)描述
ISP1181 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus interface device
ISP1181A 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus peripheral controller
ISP1181ABS 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus peripheral controller
ISP1181ABS,518 功能描述:USB 接口集成電路 USB 1.1 ADV DEVICE RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1181ABS,551 功能描述:USB 接口集成電路 USB 1.1 ADVANCED DEVICE RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
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