參數(shù)資料
型號: ISP1183BS,157
廠商: ST-ERICSSON
元件分類: 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQCC32
封裝: 5 X 5 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT-617-1, HVQFN-32
文件頁數(shù): 33/65頁
文件大?。?/td> 306K
代理商: ISP1183BS,157
ISP1183_2
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 — 7 June 2007
39 of 65
NXP Semiconductors
ISP1183
Low-power USB Peripheral Controller with DMA
12.4.3 Frame Number register (R: B4h)
This command returns the frame number of the last successfully received SOF. It is
followed by reading one or two bytes from the Frame Number register, containing the
frame number (lower byte rst). The Frame Number register is shown in Table 41.
Remark: After a bus reset, the value of the Frame Number register is undened.
Code: B4h — read frame number
Transaction — read 1 byte or 2 bytes
[1]
Reset value undened after a bus reset.
12.4.4 Chip ID register (R: B5h)
This command reads the chip identication code and hardware version number. Firmware
must check this information to determine supported functions and features. This
command accesses the Chip ID register, which is shown in Table 44.
Code: B5h — read chip ID
Transaction — read 2 bytes
Table 40.
Lock register: bit description
Bit
Symbol
Description
15 to 0
UNLOCK[15:0] Sending data AA37h unlocks internal registers and FIFOs for writing,
following a resume.
Table 41.
Frame Number register: bit allocation
Bit
15
14
13
12
11
10
9
8
Symbol
reserved
SOFRH[2:0]
Reset
00000000
Access
RRRRRRRR
Bit
7
6
5
4
3
2
1
0
Symbol
SOFRL[7:0]
Reset[1]
00000000
Access
RRRRRRRR
Table 42.
Frame Number register: bit description
Bit
Symbol
Description
15 to 11
-
reserved
10 to 8
SOFRH[2:0]
SOF frame number (upper byte)
7 to 0
SOFRL[7:0]
SOF frame number (lower byte)
Table 43.
Example of Frame Number register access
A0
Phase
Bus lines
Byte #
Description
HIGH
command
D[7:0]
-
command code (B4h)
LOW
data
D[7:0]
0
frame number (lower byte)
LOW
data
D[7:0]
1
frame number (upper byte)
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