參數(shù)資料
型號(hào): ISP1183BS,157
廠商: ST-ERICSSON
元件分類(lèi): 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQCC32
封裝: 5 X 5 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT-617-1, HVQFN-32
文件頁(yè)數(shù): 63/65頁(yè)
文件大?。?/td> 306K
代理商: ISP1183BS,157
ISP1183_2
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 — 7 June 2007
7 of 65
NXP Semiconductors
ISP1183
Low-power USB Peripheral Controller with DMA
7.
Functional description
The ISP1183 is a full-speed USB Peripheral Controller with up to 14 congurable
endpoints. It has a fast general-purpose parallel interface for communication with many
types of microcontrollers and microprocessors. It supports an 8-bit data bus with separate
address and data. The block diagram is given in Figure 1.
The ISP1183 has 2462 bytes of internal FIFO memory that is shared among enabled USB
endpoints. The type and FIFO size of each endpoint can individually be congured,
depending on the required packet size. Isochronous and bulk endpoints are
double-buffered for increased data throughput.
The ISP1183 requires two supply voltages. The core voltage is supplied from VBUS
through an internal regulator, which transforms +5.0 V to +3.3 V when VBUS is powered.
The I/O interface voltage is supplied from VDD(I/O), which can be 1.65 V to 3.6 V.
The ISP1183 operates on a 6 MHz oscillator frequency.
7.1 Analog transceiver
The transceiver is compliant with
Universal Serial Bus Specication Rev. 2.0. It directly
interfaces to the USB cable through external termination resistors.
7.2 NXP SIE
The NXP Serial Interface Engine (SIE) implements the full USB protocol layer. It is
completely hardwired for speed and needs no rmware intervention. The functions of this
block include: synchronization pattern recognition, parallel-to-serial conversion, bit stufng
and de-stufng, CRC checking and generation, Packet Identier (PID) verication and
generation, address recognition, and handshake evaluation and generation.
7.3 MMU and integrated RAM
The Memory Management Unit (MMU) and the integrated RAM provide the conversion
between the USB speed (full-speed: 12 Mbit/s bursts) and the parallel interface to the
microcontroller (maximum 11.1 MB/s). This allows the microcontroller to read and write
USB packets at its own speed.
7.4 SoftConnect
The connection to USB is accomplished by pulling pin DP (for full-speed USB devices) to
HIGH through a 1.5 k
pull-up resistor. In the ISP1183, by default, the 1.5 k pull-up
resistor is integrated on-chip. The connection is established by a command sent from the
external or system microcontroller. This allows the system microcontroller to complete its
initialization sequence before deciding to establish connection with USB. Re-initialization
of the USB connection can also be performed without disconnecting the cable.
Remark: The tolerance of the internal resistors is 25 %. This is higher than the 5 %
tolerance specied by
Universal Serial Bus Specication Rev. 2.0. The overall voltage
specication for the connection, however, can still be met with a good margin. The
decision to make use of this feature lies with the USB equipment designer.
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