參數(shù)資料
型號(hào): ISP1501
英文描述: Hi-Speed Universal Serial Bus peripheral transceiver
中文描述: 高速通用串行總線外設(shè)收發(fā)器
文件頁數(shù): 20/40頁
文件大小: 770K
代理商: ISP1501
Philips Semiconductors
ISP1501
Hi-Speed USB peripheral transceiver
Product data
Rev. 02 — 21 November 2002
20 of 40
9397 750 10025
Koninklijke Philips Electronics N.V. 2002. All rights reserved.
10.5 High-speed receive path delay
In the HS receive mode, the SYNC pattern is removed. As the preceding SYNC
pattern may be trimmed, the delay from the appearance of the first bit of the SYNC
pattern to the first valid data word on the DATA[15:0] bus is described here (see
Figure 20
, t
A
t
B
and t
C
). The receive path delay is between 106 to 122 HS bit times.
However, to have an accurate measure of the bus turn-around time, the receive path
delay is measured from the data on the DP and DM pins to the actual equivalent data
on the 16-bit data bus (see
Figure 20
, t
B
and t
C
).
Fig 19. HS transmit path delay.
handbook, full pagewidth
480 MHz clock
MGT076
8 HS bit times
8000H
XXXX
0000H
driver enabled
CLKOUT30
DATA[15:0]
TX_READY
TX_VALID
DP/DM
Fig 20. HS receive path delay.
handbook, full pagewidth
MGT202
106 to 122 HS bit times
00H
00H
00H
80H
80H
40H
4080H
CLKOUT30
DATA[15:0]
RX_VALID
DP/DM
tA
tB
tC
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