參數(shù)資料
型號: ISP1561
廠商: NXP Semiconductors N.V.
英文描述: ISP1561BM
中文描述: ISP1561BM
文件頁數(shù): 40/102頁
文件大?。?/td> 2875K
代理商: ISP1561
Philips Semiconductors
ISP1561
USB PCI host controller
Product data
Rev. 01 — 06 February 2003
40 of 102
9397 750 10015
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
11.1.3
HcCommandStatus register (address: value read from func0 or func1 of
address 10H
+
08H)
The HcCommandStatus register is used by the Host Controller to receive commands
issued by the HCD, and it also reflects the current status of the Host Controller. To the
HCD, it appears to be a “write to set” register. The Host Controller must ensure that
bits written as logic 1 become set in the register while bits written as logic 0 remain
unchanged in the register. The HCD may issue multiple distinct commands to the
Host Controller without concern for corrupting previously issued commands. The
HCD has normal read access to all bits.
The SOC[1:0] (SchedulingOverrunCount) field indicates the number of frames with
which the Host Controller has detected the scheduling overrun error. This occurs
when the Periodic list does not complete before EOF. When a scheduling overrun
4
CLE
ControlListEnable
: This bit is set to enable the processing of the
Control list in the next Frame. If cleared by the HCD, processing of
the Control list does not occur after the next SOF. The Host
Controller must check this bit whenever it wants to process the list.
When disabled, the HCD may modify the list. If HcControlCurrentED
is pointing to an ED to be removed, the HCD must advance the
pointer by updating HcControlCurrentED before re-enabling
processing of the list.
IsochronousEnable:
This bit is used by the HCD to enable or
disable processing of isochronous EDs. While processing the
periodic list in a frame, the Host Controller checks the status of this
bit when it finds an Isochronous ED (F = 1). If set (enabled), the Host
Controller continues processing the EDs. If cleared (disabled), the
Host Controller halts processing of the periodic list (which now
contains only isochronous EDs) and begins processing the
Bulk/Control lists. Setting this bit is guaranteed to take effect in the
next Frame (not the current Frame).
PeriodicListEnable:
This bit is set to enable the processing of the
periodic list in the next Frame. If cleared by the HCD, processing of
the periodic list does not occur after the next SOF. The Host
Controller must check this bit before it starts processing the list.
CBSR[1:0]
ControlBulkServiceRatio
: This specifies the service ratio of Control
EDs over Bulk EDs. Before processing any of the non-periodic lists,
the Host Controller must compare the ratio specified with its internal
count on how many non-empty Control EDs have been processed, in
determining whether to continue serving another Control ED or
switching to Bulk EDs. The internal count needs to be retained when
crossing the frame boundary. After a reset, the HCD is responsible
for restoring this value.
3
IE
2
PLE
1 to 0
00B —
1:1
01B —
2:1
10B —
3:1
11B —
4:1
Table 45:
Bit
HcControl register: bit description
…continued
Symbol
Description
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1561 HI-SPEED USB H 制造商:NXP Semiconductors 功能描述:
ISP1561BM 制造商:NXP Semiconductors 功能描述:
ISP1561BM,518 功能描述:USB 接口集成電路 USB 2.0 HOST CONTROLLER RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1561BM,551 功能描述:USB 接口集成電路 USB 2.0 HOST CONTROLLER RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1561BM,557 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20