參數(shù)資料
型號: ISP1582BS,557
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQCC56
封裝: 8 X 8 MM, 0.85 MM PITCH, PLASTIC, MO-220, SOT-684-1, HVQFN-56
文件頁數(shù): 32/69頁
文件大?。?/td> 365K
代理商: ISP1582BS,557
ISP1582_7
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 07 — 22 September 2008
37 of 68
NXP Semiconductors
ISP1582
Hi-Speed USB peripheral controller
In EOT-only mode, DIS_XFER_CNT must be set to logic 1. Although the DMA transfer
counter can still be programmed, it will not have any effect on the DMA transfer. The DMA
transfer will start once the DMA command is issued. Any of the following three ways will
terminate this DMA transfer:
Detecting an external EOT
Detecting an internal EOT (short packet on an OUT token)
Issuing a GDMA stop command
There are three interrupts programmable to differentiate the method of DMA termination:
bits INT_EOT, EXT_EOT and DMA_XFER_OK in the DMA Interrupt Reason register. For
details, see Table 55.
Remark: The DMA bus defaults to 3-state, until a DMA command is executed. All the
other control signals are not 3-stated.
8.4.1 DMA Command register (address: 30h)
The DMA Command register is a 1-byte register (for bit allocation, see Table 44) that
initiates all DMA transfer activity on the DMA controller. The register is write-only: reading
it will return FFh.
Remark: The DMA bus will be in 3-state, until a DMA command is executed.
Table 43.
Control bits for GDMA read/write (opcode = 00h/01h)
Control bits
Description
Reference
DMA Conguration register
MODE[1:0]
determines the active read/write data strobe signals
WIDTH
selects the DMA bus width: 8 or 16 bits
DIS_XFER_CNT
disables the use of the DMA Transfer Counter
DMA Hardware register
EOT_POL
selects the polarity of the EOT signal
ENDIAN[1:0]
determines whether the data is to be byte swapped or
normal; applicable only in 16-bit mode
ACK_POL, DREQ_POL,
WRITE_POL, READ_POL
select polarity of DMA handshake signals
Table 44.
DMA Command register: bit allocation
Bit
7
6
5
4
3
2
1
0
Symbol
DMA_CMD[7:0]
Reset
11111111
Bus reset
11111111
Access
WWWWWWWW
Table 45.
DMA Command register: bit description
Bit
Symbol
Description
7 to 0
DMA_CMD[7:0]
DMA command code; see Table 46.
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ISP1583 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Hi-Speed Universal Serial Bus peripheral controller