參數(shù)資料
型號(hào): ISP1582BS,557
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQCC56
封裝: 8 X 8 MM, 0.85 MM PITCH, PLASTIC, MO-220, SOT-684-1, HVQFN-56
文件頁(yè)數(shù): 49/69頁(yè)
文件大?。?/td> 365K
代理商: ISP1582BS,557
ISP1582_7
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 07 — 22 September 2008
52 of 68
NXP Semiconductors
ISP1582
Hi-Speed USB peripheral controller
[1]
Excluding the rst transition from the idle state.
[2]
Characterized only, not tested. Limits guaranteed by design.
tHSF
fall time (10 % to 90 %)
with captive cable
500
-
ps
Data source timing
Full-speed mode
tFEOPT
source SE0 interval of EOP
[2] 160
-
175
ns
tFDEOP
source jitter for differential
transition to SE0 transition
2
-
+5
ns
Receiver timing
Full-speed mode
tJR1
receiver jitter to next transition
18.5
-
+18.5
ns
tJR2
receiver jitter for paired transitions see Figure 14
9
-
+9
ns
tFEOPR
receiver SE0 interval of EOP
accepted as EOP; see Figure 13
--ns
tFST
width of SE0 interval during
differential transition
rejected as EOP; see Figure 15
[2] --14
ns
Table 80.
Dynamic characteristics: analog I/O pins DP and DM …continued
VCC = 3.3 V ± 0.3 V; VGND =0 V; Tamb = 40 °C to +85 °C; CL = 50 pF; RPU = 1.5 k on DP to VTERM; test circuit of Figure 23;
unless otherwise specied.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
TPERIOD is the bit duration corresponding to the USB data rate.
Full-speed timing symbols have a subscript prex ‘F’, low-speed timing symbols have a prex 'L'.
Fig 13. Source differential data-to-EOP transition skew and EOP width
mgr776
TPERIOD
differential
data lines
crossover point
differential data to
SE0/EOP skew
N
× TPERIOD + tDEOP
source EOP width: tEOPT
receiver EOP width: tEOPR
crossover point
extended
+3.3 V
0 V
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ISP1583 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Hi-Speed Universal Serial Bus peripheral controller