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參數(shù)資料
| 型號： | ISP1582BS |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | Hi-Speed Universal Serial Bus peripheral controller |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQCC56 |
| 封裝： | 8 X 8 MM, 0.85 MM PITCH, PLASTIC, MO-220, SOT-684-1, HVQFN-56 |
| 文件頁數(shù)： | 29/66頁 |
| 文件大?。?/td> | 325K |
| 代理商： | ISP1582BS |
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Philips Semiconductors
ISP1582
Hi-Speed USB peripheral controller
Preliminary data
Rev. 03 — 25 August 2004
29 of 66
9397 750 13699
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
[1]
No interrupt is designed for OTG. The V
BUS
interrupt, however, may assert as a side effect during the
V
BUS
pulsing (see note 2).
When OTG is in progress, the V
BUS
interrupt may be set because V
BUS
is charged over V
BUS
sensing
threshold or the OTG host has turned on the V
BUS
supply to the device. Even if the V
BUS
interrupt is
found during SRP, the device should complete data-line pulsing and V
BUS
pulsing before starting the
B_SESSION_VALID detection.
OTG implementation applies to the device with self-power capability. If the device works in sharing
mode, it should provide a switch circuit to supply power to the ISP1582 core during SRP.
[2]
[3]
Session Request Protocol (SRP):
The ISP1582 can initiate an SRP. The B-device initiates SRP by data-line pulsing
followed by V
BUS
pulsing. The A-device can detect either data-line pulsing or V
BUS
pulsing.
The ISP1582 can initiate the B-device SRP by performing the following steps:
1. Detect initial conditions: read bit INITCOND of the OTG register.
2. Start data-line pulsing: set bit DP of the OTG register to logic 1.
3. Wait for 5 ms to 10 ms.
4. Stop data-line pulsing: set bit DP of the OTG register to logic 0.
5. Start V
BUS
pulsing: set bit VP of the OTG register to logic 1.
6. Wait for 10 ms to 20 ms.
7. Stop V
BUS
pulsing: set bit VP of the OTG register to logic 0.
8. Discharge V
BUS
for about 30 ms: optional by using bit DISCV of the OTG register.
3
INIT COND
Write logic 1 to clear this bit. The device clears this bit, and waits for
more than 2 ms to check the bit status. If it reads logic 0, it means
that V
BUS
remains lower than 0.8 V, and DP or DM at SE0 during the
elapsed time is cleared. The device can then start a B-device SRP. If
it reads logic 1, it means that the initial condition of an SRP is
violated. So, the device should abort SRP.
The bit is set to logic 1 by the ISP1582 when initial conditions are not
met, and only writing logic 1 clears the bit. (If initial conditions are not
met after this bit has been cleared, it will be set again).
Remark:
This implementation does not cover the case if an initial
SRP condition is violated when this bit is read and data-line pulsing is
started.
Set to logic 1 to discharge V
BUS
. The device discharges V
BUS
before
starting a new SRP. The discharge can take as long as 30 ms for
V
BUS
to be charged less than 0.8 V. This bit must be cleared (write
logic 0) before starting a session end detection.
Set to logic 1 to start V
BUS
pulsing. This bit must be set for more than
16 ms and must be cleared before 26 ms.
1 —
Enables the OTG function. The V
BUS
sensing functionality will be
bypassed.
2
DISCV
1
VP
0
OTG
0 —
Normal operation. All OTG control bits will be masked. Status
bits are undefined.
Table 27:
Bit
OTG register: bit description
[1][2][3]
…continued
Symbol
Description
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISP1582BS,518 | 功能描述:USB 接口集成電路 USB PERIPH CNTRLR RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1582BS,551 | 功能描述:USB 接口集成電路 HI-SPEED USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1582BS,557 | 功能描述:USB 接口集成電路 HI-SPEED USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1582BSGA | 功能描述:IC UBS CTRL HI-SPEED 56HVQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| ISP1582BS-S | 功能描述:USB 接口集成電路 HI-SPEED USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
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