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參數(shù)資料
| 型號： | ISP1583BS |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | Hi-Speed Universal Serial Bus peripheral controller |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQCC64 |
| 封裝： | 9 X 9 MM, 0.85 MM HEIGHT, LEAD FREE, PLASTIC, MO-220, SOT-804-1, HVQFN-64 |
| 文件頁數(shù)： | 55/87頁 |
| 文件大?。?/td> | 420K |
| 代理商： | ISP1583BS |
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Philips Semiconductors
ISP1583
Hi-Speed USB peripheral controller
Product data
Rev. 03 — 12 July 2004
55 of 87
9397 750 13461
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Table 73
shows the status of the bits in the DMA Interrupt Reason register when the
corresponding bits in the Interrupt register is set.
[1]
1 indicates that the bit is set and 0 indicates that the bit is not set. A bit is set when the corresponding
EOT condition is met. For example; EXT_EOT is set if external EOT conditions are met (pin EOT
active), regardless of other EOT conditions. If multiple EOT conditions are met, the corresponding
interrupt bits are set.
If both EXT_EOT and DMA_XFER_OK conditions are met in DMA for an IN endpoint, the EXT_EOT
interrupt is not set.
The value of INT_EOT may not be accurate if an external or internal transfer counter is programmed
with a value that is lower than the transfer that the host requests. To terminate an OUT transfer with
INT_EOT, the external or internal DMA counter should be programmed as a multiple of the full-packet
length of the DMA endpoint. When a short packet is successfully transferred by DMA, INT_EOT is set.
[2]
9.4.7
DMA Interrupt Enable register (address: 54h)
This 2-byte register controls the interrupt generation of the source bits in the DMA
Interrupt Reason register (see
Table 70
). The bit allocation is given in
Table 74
. The
bit description is given in
Table 71
.
Logic 1 enables interrupt generation. After a bus reset, interrupt generation is
disabled, with the values turning to logic 0.
Table 72:
INT_EOT
Internal EOT-functional relation with DMA_XFER_OK bit
DMA_
XFER_OK
0
During the DMA transfer, there is a premature termination with
short packet.
1
DMA transfer is completed with short packet and the DMA
transfer counter has reached 0.
1
DMA transfer is completed without any short packet and the
DMA transfer counter has reached 0.
Description
1
1
0
Table 73:
Status
Status of the bits in the DMA Interrupt Reason register
[1]
EXT_EOT
INT_EOT
DMA_XFER_OK
Counter enabled Counter disabled
1
1
1
1
IN full
IN short
OUT full
OUT short
1
1
1
1
0
0
0
0
0
0
0
1
[2]
Table 74:
Bit
Symbol
DMA Interrupt Enable register: bit allocation
15
14
TEST4
13
12
11
10
9
8
reserved
IE_GDMA_
STOP
0
0
R/W
IE_EXT_
EOT
0
0
R/W
IE_INT_
EOT
0
0
R/W
IE_INTRQ_
ENDING
0
0
R/W
IE_DMA_
XFER_OK
0
0
R/W
Reset
Bus reset
Access
-
-
-
-
-
-
-
-
R
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| ISP1583BS,518 | 功能描述:USB 接口集成電路 USB PERIPH CNTRLR RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1583BS,551 | 功能描述:USB 接口集成電路 HI-SPEED USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1583BS,557 | 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1583BS518 | 制造商:ST-Ericsson 功能描述:CONTROLLER USB PERIPHERAL 64HVQFN |
| ISP1583BSGA | 功能描述:IC USB CTRL HI-SPEED 64HVQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
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