參數(shù)資料
型號： ISP1761BE,518
廠商： ST-ERICSSON
元件分類： 總線控制器
英文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP128
封裝： 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT425-1, LQFP-128
文件頁數(shù)： 126/164頁
文件大?。?/td> 767K
代理商： ISP1761BE,518
ISP1761_5
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 05 — 13 March 2008
63 of 163
NXP Semiconductors
ISP1761
Hi-Speed USB OTG controller
56 to 55
Cerr[1:0]
HW — writes
SW — writes
-
Error Counter: This eld corresponds to the Cerr[1:0] eld in TD.
The default value of this eld is zero for isochronous transactions.
00 — The transaction will not retry.
11 — The transaction will retry three times. Hardware will
decrement these values.
54 to 51
NakCnt[3:0]
HW — writes
SW — writes
-
NAK Counter: This eld corresponds to the NakCnt eld in TD.
Software writes for the initial PTD launch. The V bit is reset if
NakCnt decrements to zero and RL is a non-zero value. It reloads
from RL if transaction is ACK-ed.
50 to 47
reserved
-
46 to 32
NrBytes
Transferred
[14:0]
HW — writes
SW — writes
0000
-
Number of Bytes Transferred: This eld indicates the number of
bytes sent or received for this transaction. If Mult[1:0] is greater
than one, it is possible to store intermediate results in this eld.
DW2
31 to 29
reserved
-
Set to 0 for asynchronous TD.
28 to 25
RL[3:0]
SW — writes -
Reload: If RL is set to 0h, hardware ignores the NakCnt value. RL
and NakCnt are set to the same value before a transaction.
24
reserved
-
Always 0 for asynchronous TD.
23 to 8
DataStart
Address[15:0]
SW — writes -
Data Start Address: This is the start address for data that will be
sent or received on or from the USB bus. This is the internal
memory address and not the direct CPU address.
RAM address = (CPU address
400h) / 8
7 to 0
reserved
-
DW1
63 to 47
reserved
-
Always 0 for asynchronous TD.
46
S
SW — writes -
This bit indicates whether a split transaction has to be executed:
0 — High-speed transaction
1 — Split transaction
45 to 44
EPType[1:0]
SW — writes -
Transaction type:
00 — Control
10 — Bulk
43 to 42
Token[1:0]
SW — writes -
Token: Identies the token Packet Identier (PID) for this
transaction:
00 — OUT
01 — IN
10 — SETUP
11 — PING (written by hardware only).
41 to 35
DeviceAddress
[6:0]
SW — writes -
Device Address: This is the USB address of the function
containing the endpoint that is referred to by this buffer.
34 to 32
EndPt[3:1]
SW — writes -
Endpoint: This is the USB address of the endpoint within the
function.
DW0
31
EndPt[0]
SW — writes -
Endpoint: This is the USB address of the endpoint within the
function.
Table 64.
High-speed bulk IN and OUT: bit description …continued
Bit
Symbol
Access
Value
Description
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