219
AT90PWM216/316 [DATASHEET]
7710H–AVR–07/2013
Bit 6– AC2IE: Analog Comparator 2 Interrupt Enable bit
Set this bit to enable the analog comparator 2 interrupt.
Clear this bit to disable the analog comparator 2 interrupt.
Bit 5, 4– AC2IS1, AC2IS0: Analog Comparator 2 Interrupt Select bit
These 2 bits determine the sensitivity of the interrupt trigger.
Bit 2, 1, 0– AC2M2, AC2M1, AC2M0: Analog Comparator 2 Multiplexer register
These 3 bits determine the input of the negative input of the analog comparator.
19.2.4
Analog Comparator Status Register – ACSR
Bit 6– AC2IF: Analog Comparator 2 Interrupt Flag Bit
This bit is set by hardware when comparator 2 output event triggers off the interrupt mode defined by AC2IS1 and
AC2IS0 bits in AC2CON register.
This bit is cleared by hardware when the corresponding interrupt vector is executed in case the AC2IE in AC2CON
register is set. Anyway, this bit is cleared by writing a logical one on it.
This bit can also be used to synchronize ADC or DAC conversions.
Bit 5– AC1IF: Analog Comparator 1 Interrupt Flag Bit
This bit is set by hardware when comparator 1 output event triggers off the interrupt mode defined by AC1IS1 and
AC1IS0 bits in AC1CON register.
This bit is cleared by hardware when the corresponding interrupt vector is executed in case the AC1IE in AC1CON
Table 19-5.
Interrupt sensitivity selection
AC2IS1
AC2IS0
Description
0
Comparator Interrupt on output toggle
01
Reserved
1
0
Comparator interrupt on output falling edge
1
Comparator interrupt on output rising edge
Table 19-6.
Analog Comparator 2 negative input selection
AC2M2
AC2M1
AC2M0
Description
0
“Vref”/6.40
0
1
“Vref”/3.20
0
1
0
“Vref”/2.13
0
1
“Vref”/1.60
1
0
Analog Comparator Negative Input (ACMPM pin)
1
0
1
DAC result
110
Reserved
111
Reserved
Bit
7
654
3
2
1
0
–
AC2IF
AC1IF
AC0IF
CLKPLL
AC2O
AC1O
AC0O
ACSR
Read/Write
-
R/W
-
R
Initial Value
0