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參數(shù)資料
| 型號： | K4C89183AF |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 288Mb x18 Network-DRAM2 Specification |
| 中文描述： | 288Mb x18網絡DRAM2規(guī)范 |
| 文件頁數(shù)： | 49/55頁 |
| 文件大小： | 1470K |
| 代理商： | K4C89183AF |
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K4C89183AF
- 49 -
REV. 0.7 Jan. 2005
Functional Description (Continued)
Data Input/Output : DQ0 ~ DQ17
The input data of DQ0 to DQ17 are taken in synchronizing with the both edges of DS input signal.
The output data of DQ0 to DQ17 are outputted synchronizing with the both edges of QS output signal.
Data Strobe : DS or QS
Method of data strobe is chosen by Extended mode register.
(1) Unidirectional DS/QS mode
DS is input signal and QS is output signal. Both edges of DS are used to sample all DQs at Write operation. Both edges of QS
are used for trigger signal of all DQs at Read operation. During Write. Auto-Refresh and NOP cycle, QS assert always "Low"
level. QS is Hi-Z in Self-Refresh mode.
(2) Unidirectional DS/Free running QS mode
DS is input signal and QS is output signal. Both edges of DS are used to sample all DQs at Write operation. Both edges of QS
are used for trigger signal of all DQs at Read operation. QS assert always toggle signal except Self-Refresh mode. This strobe
type is easy to use for pin to pin connect application.
Power Supply : V
DD
, V
DDQ
, V
SS
, V
SSQ
V
DD
and V
SS
are supply pins for memory core and peripheral circuits.
V
DDQ
and V
SSQ
are power supply pins for the output buffer.
Reference Voltage : V
REF
V
REF
is reference voltage for all input signals.
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