參數(shù)資料
型號(hào)： K9F5608D0C-Y
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
元件分類： 圓形連接器
英文描述： Circular Connector; MIL SPEC:MIL-DTL-38999 Series III; Body Material:Metal; Series:TV07; Number of Contacts:37; Connector Shell Size:25; Connecting Termination:Crimp; Circular Shell Style:Jam Nut Receptacle; Body Style:Straight
中文描述： 32M的× 8位，16米x 16位NAND閃存
文件頁(yè)數(shù)： 33/42頁(yè)
文件大?。?/td> 684K
代理商： K9F5608D0C-Y
FLASH MEMORY
33
K9F5608D0C
K9F5608U0C
K9F5608Q0C
K9F5616D0C
K9F5616U0C
K9F5616Q0C
Figure 12. Block Erase Operation
BLOCK ERASE
The Erase operation is done on a block basis. Block address loading is accomplished in two cycles initiated by an Erase Setup com-
mand(60h). Only address A
14
to A
24
is valid while A
9
to A
13
is ignored. The Erase Confirm command(D0h) following the block address
loading initiates the internal erasing process. This two-step sequence of setup followed by execution command ensures that memory
contents are not accidentally erased due to external noise conditions.
At the rising edge of WE after the erase confirm command input, the internal write controller handles erase and erase-verify. When
the erase operation is completed, the Write Status Bit(I/O 0) may be checked. Figure 12 details the sequence.
60h
Block Add. : A
9
~ A
24
R/B
Address Input(2Cycle)
I/O
0
Pass
D0h
70h
Fail
t
BERS
READ STATUS
The device contains a Status Register which may be read to find out whether program or erase operation is completed, and whether
the program or erase operation is completed successfully. After writing 70h command to the command register, a read cycle outputs
the content of the Status Register to the I/O pins on the falling edge of CE or RE, whichever occurs last. This two line control allows
the system to poll the progress of each device in multiple memory connections even when R/B pins are common-wired. RE or CE
does not need to be toggled for updated status. Refer to table 4 for specific Status Register definitions. The command register
remains in Status Read mode until further commands are issued to it. Therefore, if the status register is read during a random read
cycle, a read command(00h or 50h) should be given before sequential page read cycle.
Table4. Read Status Register Definition
I/O #
Status
Definition
I/O 0
Program / Erase
"0" : Successful Program / Erase
"1" : Error in Program / Erase
I/O 1
Reserved for Future
Use
"0"
I/O 2
"0"
I/O 3
"0"
I/O 4
"0"
I/O 5
"0"
I/O 6
Device Operation
"0" : Busy "1" : Ready
I/O 7
Write Protect
"0" : Protected "1" : Not Protected
I/O 8~15
Not use
Don’t care
I/Ox
相關(guān)PDF資料
PDF描述
K9F5608U0 TV 6C 6#12 PIN WALL RECP
K9F5608U0A TV 6C 6#12 PIN RECP
K9F5608U0A-YCB0 TV 16C 16#16 PIN RECP
K9F5608U0A-YIB0 TV 79C 79#22D PIN RECP
K9F6408U0C-T 8M x 8 Bit NAND Flash Memory
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
K9F5608D0D 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32M x 8 Bit NAND Flash Memory
K9F5608D0D-FCB0 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32M x 8 Bit NAND Flash Memory
K9F5608D0D-FIB0 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32M x 8 Bit NAND Flash Memory
K9F5608D0D-J 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32M x 8 Bit NAND Flash Memory
K9F5608D0D-JCB0 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32M x 8 Bit NAND Flash Memory
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