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參數(shù)資料
| 型號： | KAD5510P-25Q48 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 22/31頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 10BIT CMOS 250MSPS 48QFN |
| 標準包裝： | 40 |
| 系列： | FemtoCharge™ |
| 位數(shù)： | 10 |
| 采樣率（每秒）： | 250M |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 254mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 48-QFN（7x7） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | * |
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KAD5510P
29
FN7693.2
May 2, 2011
Filling the exposed thermal pad area with vias provides optimum heat
transfer to the PCB’s internal plane(s). Vias should be evenly distributed
from edge-to-edge on the exposed pad to maintain a constant
temperature across the entire pad. Setting the center-to-center spacing
of the vias at three times the via pad radius will provide good heat
transfer for high power devices. The vias below the KAD5510P may be
spaced further apart as shown on the evaluation board since it is a low-
power device. The via diameter should be small but not too small to
allow solder wicking during reflow. PCB fabrication and assembly
companies can provide specific guidelines based on the layer stack and
assembly process.
Connect all vias under the KAD5510P to AVSS. It is important to
maximize the heat transfer by avoiding the use of “thermal relief”
patterns when connecting the vias to the internal AVSS plane(s).
Definitions
Analog Input Bandwidth is the analog input frequency at which
the spectral output power at the fundamental frequency (as
determined by FFT analysis) is reduced by 3dB from its full-scale
low-frequency value. This is also referred to as Full Power
Bandwidth.
Aperture Delay or Sampling Delay is the time required after the
rise of the clock input for the sampling switch to open, at which
time the signal is held for conversion.
Aperture Jitter is the RMS variation in aperture delay for a set of
samples.
Clock Duty Cycle is the ratio of the time the clock wave is at logic
high to the total time of one clock period.
Differential Non-Linearity (DNL) is the deviation of any code width
from an ideal 1 LSB step.
Effective Number of Bits (ENOB) is an alternate method of specifying
Signal to Noise-and-Distortion Ratio (SINAD). In dB, it is calculated as:
ENOB = (SINAD - 1.76)/6.02
Gain Error is the ratio of the difference between the voltages that
cause the lowest and highest code transitions to the full-scale
voltage less 2 LSB. It is typically expressed in percent.
Integral Non-Linearity (INL) is the maximum deviation of the
ADC’s transfer function from a best fit line determined by a least
squares curve fit of that transfer function, measured in units of
LSBs.
Least Significant Bit (LSB) is the bit that has the smallest value or
weight in a digital word. Its value in terms of input voltage is
VFS/(2N-1) where N is the resolution in bits.
Missing Codes are output codes that are skipped and will never
appear at the ADC output. These codes cannot be reached with
any input value.
Most Significant Bit (MSB) is the bit that has the largest value or
weight.
Pipeline Delay is the number of clock cycles between the
initiation of a conversion and the appearance at the output pins
of the data.
Power Supply Rejection Ratio (PSRR) is the ratio of the observed
magnitude of a spur in the ADC FFT, caused by an AC signal
superimposed on the power supply voltage.
Signal to Noise-and-Distortion (SINAD) is the ratio of the RMS
signal amplitude to the RMS sum of all other spectral
components below one half the clock frequency, including
harmonics but excluding DC.
Signal-to-Noise Ratio (without Harmonics) is the ratio of the RMS
signal amplitude to the RMS sum of all other spectral
components below one-half the sampling frequency, excluding
harmonics and DC.
SNR and SINAD are either given in units of dB when the power of
the fundamental is used as the reference, or dBFS (dB to full
scale) when the converter’s full-scale input power is used as the
reference.
Spurious-Free-Dynamic Range (SFDR) is the ratio of the RMS
signal amplitude to the RMS value of the largest spurious
spectral component. The largest spurious spectral component
may or may not be a harmonic.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| KAD5510P-50 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:10-Bit, 500MSPS A/D Converter |
| KAD5510P-50_09 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:10-Bit, 500MSPS A/D Converter |
| KAD5510P-50_0910 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:10-Bit, 500MSPS A/D Converter |
| KAD5510P-50Q72 | 功能描述:IC ADC 10BIT 500MSPS SGL 72-QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:FemtoCharge™ 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:250 系列:- 位數(shù):12 采樣率（每秒）:1.8M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:1.82W 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-LQFP 供應(yīng)商設(shè)備封裝:48-LQFP（7x7） 包裝:管件 輸入數(shù)目和類型:2 個單端，單極 |
| KAD5512HP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:High Performance 12-Bit, 250/210/170/125MSPS ADC |
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